303 lines
7.4 KiB
C
303 lines
7.4 KiB
C
/* OmniVision OV76BE Camera Chip Support Code
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*
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* Copyright (c) 1999-2004 Mark McClelland <mark@alpha.dyndns.org>
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* http://alpha.dyndns.org/ov511/
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version. NO WARRANTY OF ANY KIND is expressed or implied.
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*/
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#define DEBUG
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#include <linux/slab.h>
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#include "ovcamchip_priv.h"
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/* OV7610 registers: Since the OV76BE is undocumented, we'll settle for these
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* for now. */
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#define REG_GAIN 0x00 /* gain [5:0] */
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#define REG_BLUE 0x01 /* blue channel balance */
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#define REG_RED 0x02 /* red channel balance */
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#define REG_SAT 0x03 /* saturation */
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#define REG_CNT 0x05 /* Y contrast */
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#define REG_BRT 0x06 /* Y brightness */
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#define REG_BLUE_BIAS 0x0C /* blue channel bias [5:0] */
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#define REG_RED_BIAS 0x0D /* red channel bias [5:0] */
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#define REG_GAMMA_COEFF 0x0E /* gamma settings */
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#define REG_WB_RANGE 0x0F /* AEC/ALC/S-AWB settings */
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#define REG_EXP 0x10 /* manual exposure setting */
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#define REG_CLOCK 0x11 /* polarity/clock prescaler */
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#define REG_FIELD_DIVIDE 0x16 /* field interval/mode settings */
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#define REG_HWIN_START 0x17 /* horizontal window start */
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#define REG_HWIN_END 0x18 /* horizontal window end */
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#define REG_VWIN_START 0x19 /* vertical window start */
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#define REG_VWIN_END 0x1A /* vertical window end */
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#define REG_PIXEL_SHIFT 0x1B /* pixel shift */
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#define REG_YOFFSET 0x21 /* Y channel offset */
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#define REG_UOFFSET 0x22 /* U channel offset */
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#define REG_ECW 0x24 /* exposure white level for AEC */
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#define REG_ECB 0x25 /* exposure black level for AEC */
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#define REG_FRAMERATE_H 0x2A /* frame rate MSB + misc */
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#define REG_FRAMERATE_L 0x2B /* frame rate LSB */
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#define REG_ALC 0x2C /* Auto Level Control settings */
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#define REG_VOFFSET 0x2E /* V channel offset adjustment */
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#define REG_ARRAY_BIAS 0x2F /* array bias -- don't change */
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#define REG_YGAMMA 0x33 /* misc gamma settings [7:6] */
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#define REG_BIAS_ADJUST 0x34 /* misc bias settings */
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/* Window parameters */
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#define HWSBASE 0x38
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#define HWEBASE 0x3a
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#define VWSBASE 0x05
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#define VWEBASE 0x05
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struct ov76be {
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int auto_brt;
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int auto_exp;
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int bandfilt;
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int mirror;
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};
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/* NOTE: These are the same as the 7x10 settings, but should eventually be
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* optimized for the OV76BE */
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static struct ovcamchip_regvals regvals_init_76be[] = {
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{ 0x10, 0xff },
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{ 0x16, 0x03 },
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{ 0x28, 0x24 },
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{ 0x2b, 0xac },
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{ 0x12, 0x00 },
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{ 0x38, 0x81 },
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{ 0x28, 0x24 }, /* 0c */
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{ 0x0f, 0x85 }, /* lg's setting */
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{ 0x15, 0x01 },
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{ 0x20, 0x1c },
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{ 0x23, 0x2a },
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{ 0x24, 0x10 },
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{ 0x25, 0x8a },
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{ 0x26, 0xa2 },
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{ 0x27, 0xc2 },
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{ 0x2a, 0x04 },
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{ 0x2c, 0xfe },
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{ 0x2d, 0x93 },
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{ 0x30, 0x71 },
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{ 0x31, 0x60 },
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{ 0x32, 0x26 },
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{ 0x33, 0x20 },
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{ 0x34, 0x48 },
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{ 0x12, 0x24 },
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{ 0x11, 0x01 },
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{ 0x0c, 0x24 },
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{ 0x0d, 0x24 },
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{ 0xff, 0xff }, /* END MARKER */
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};
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/* This initializes the OV76be camera chip and relevant variables. */
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static int ov76be_init(struct i2c_client *c)
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{
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struct ovcamchip *ov = i2c_get_clientdata(c);
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struct ov76be *s;
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int rc;
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DDEBUG(4, &c->dev, "entered");
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rc = ov_write_regvals(c, regvals_init_76be);
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if (rc < 0)
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return rc;
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ov->spriv = s = kzalloc(sizeof *s, GFP_KERNEL);
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if (!s)
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return -ENOMEM;
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s->auto_brt = 1;
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s->auto_exp = 1;
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return rc;
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}
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static int ov76be_free(struct i2c_client *c)
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{
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struct ovcamchip *ov = i2c_get_clientdata(c);
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kfree(ov->spriv);
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return 0;
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}
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static int ov76be_set_control(struct i2c_client *c,
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struct ovcamchip_control *ctl)
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{
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struct ovcamchip *ov = i2c_get_clientdata(c);
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struct ov76be *s = ov->spriv;
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int rc;
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int v = ctl->value;
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switch (ctl->id) {
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case OVCAMCHIP_CID_BRIGHT:
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rc = ov_write(c, REG_BRT, v >> 8);
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break;
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case OVCAMCHIP_CID_SAT:
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rc = ov_write(c, REG_SAT, v >> 8);
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break;
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case OVCAMCHIP_CID_EXP:
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rc = ov_write(c, REG_EXP, v);
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break;
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case OVCAMCHIP_CID_FREQ:
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{
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int sixty = (v == 60);
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rc = ov_write_mask(c, 0x2a, sixty?0x00:0x80, 0x80);
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if (rc < 0)
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goto out;
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rc = ov_write(c, 0x2b, sixty?0x00:0xac);
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if (rc < 0)
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goto out;
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rc = ov_write_mask(c, 0x76, 0x01, 0x01);
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break;
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}
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case OVCAMCHIP_CID_BANDFILT:
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rc = ov_write_mask(c, 0x2d, v?0x04:0x00, 0x04);
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s->bandfilt = v;
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break;
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case OVCAMCHIP_CID_AUTOBRIGHT:
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rc = ov_write_mask(c, 0x2d, v?0x10:0x00, 0x10);
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s->auto_brt = v;
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break;
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case OVCAMCHIP_CID_AUTOEXP:
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rc = ov_write_mask(c, 0x13, v?0x01:0x00, 0x01);
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s->auto_exp = v;
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break;
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case OVCAMCHIP_CID_MIRROR:
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rc = ov_write_mask(c, 0x12, v?0x40:0x00, 0x40);
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s->mirror = v;
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break;
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default:
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DDEBUG(2, &c->dev, "control not supported: %d", ctl->id);
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return -EPERM;
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}
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out:
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DDEBUG(3, &c->dev, "id=%d, arg=%d, rc=%d", ctl->id, v, rc);
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return rc;
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}
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static int ov76be_get_control(struct i2c_client *c,
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struct ovcamchip_control *ctl)
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{
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struct ovcamchip *ov = i2c_get_clientdata(c);
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struct ov76be *s = ov->spriv;
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int rc = 0;
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unsigned char val = 0;
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switch (ctl->id) {
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case OVCAMCHIP_CID_BRIGHT:
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rc = ov_read(c, REG_BRT, &val);
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ctl->value = val << 8;
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break;
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case OVCAMCHIP_CID_SAT:
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rc = ov_read(c, REG_SAT, &val);
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ctl->value = val << 8;
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break;
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case OVCAMCHIP_CID_EXP:
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rc = ov_read(c, REG_EXP, &val);
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ctl->value = val;
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break;
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case OVCAMCHIP_CID_BANDFILT:
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ctl->value = s->bandfilt;
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break;
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case OVCAMCHIP_CID_AUTOBRIGHT:
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ctl->value = s->auto_brt;
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break;
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case OVCAMCHIP_CID_AUTOEXP:
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ctl->value = s->auto_exp;
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break;
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case OVCAMCHIP_CID_MIRROR:
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ctl->value = s->mirror;
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break;
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default:
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DDEBUG(2, &c->dev, "control not supported: %d", ctl->id);
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return -EPERM;
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}
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DDEBUG(3, &c->dev, "id=%d, arg=%d, rc=%d", ctl->id, ctl->value, rc);
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return rc;
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}
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static int ov76be_mode_init(struct i2c_client *c, struct ovcamchip_window *win)
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{
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int qvga = win->quarter;
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/******** QVGA-specific regs ********/
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ov_write(c, 0x14, qvga?0xa4:0x84);
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/******** Palette-specific regs ********/
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if (win->format == VIDEO_PALETTE_GREY) {
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ov_write_mask(c, 0x0e, 0x40, 0x40);
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ov_write_mask(c, 0x13, 0x20, 0x20);
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} else {
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ov_write_mask(c, 0x0e, 0x00, 0x40);
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ov_write_mask(c, 0x13, 0x00, 0x20);
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}
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/******** Clock programming ********/
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ov_write(c, 0x11, win->clockdiv);
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/******** Resolution-specific ********/
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if (win->width == 640 && win->height == 480)
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ov_write(c, 0x35, 0x9e);
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else
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ov_write(c, 0x35, 0x1e);
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return 0;
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}
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static int ov76be_set_window(struct i2c_client *c, struct ovcamchip_window *win)
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{
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int ret, hwscale, vwscale;
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ret = ov76be_mode_init(c, win);
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if (ret < 0)
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return ret;
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if (win->quarter) {
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hwscale = 1;
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vwscale = 0;
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} else {
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hwscale = 2;
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vwscale = 1;
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}
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ov_write(c, 0x17, HWSBASE + (win->x >> hwscale));
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ov_write(c, 0x18, HWEBASE + ((win->x + win->width) >> hwscale));
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ov_write(c, 0x19, VWSBASE + (win->y >> vwscale));
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ov_write(c, 0x1a, VWEBASE + ((win->y + win->height) >> vwscale));
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return 0;
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}
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static int ov76be_command(struct i2c_client *c, unsigned int cmd, void *arg)
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{
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switch (cmd) {
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case OVCAMCHIP_CMD_S_CTRL:
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return ov76be_set_control(c, arg);
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case OVCAMCHIP_CMD_G_CTRL:
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return ov76be_get_control(c, arg);
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case OVCAMCHIP_CMD_S_MODE:
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return ov76be_set_window(c, arg);
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default:
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DDEBUG(2, &c->dev, "command not supported: %d", cmd);
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return -ENOIOCTLCMD;
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}
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}
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struct ovcamchip_ops ov76be_ops = {
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.init = ov76be_init,
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.free = ov76be_free,
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.command = ov76be_command,
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};
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