199 lines
4.9 KiB
C
199 lines
4.9 KiB
C
/*
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* linux/arch/m32r/kernel/time.c
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*
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* Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
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* Hitoshi Yamamoto
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* Taken from i386 version.
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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* Copyright (C) 1996, 1997, 1998 Ralf Baechle
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*
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* This file contains the time handling details for PC-style clocks as
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* found in some MIPS systems.
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*
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* Some code taken from sh version.
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* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
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* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
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*/
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#undef DEBUG_TIMER
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/profile.h>
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#include <asm/io.h>
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#include <asm/m32r.h>
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#include <asm/hw_irq.h>
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#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE)
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/* this needs a better home */
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DEFINE_SPINLOCK(rtc_lock);
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#ifdef CONFIG_RTC_DRV_CMOS_MODULE
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EXPORT_SYMBOL(rtc_lock);
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#endif
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#endif /* pc-style 'CMOS' RTC support */
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#ifdef CONFIG_SMP
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extern void smp_local_timer_interrupt(void);
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#endif
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#define TICK_SIZE (tick_nsec / 1000)
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/*
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* Change this if you have some constant time drift
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*/
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/* This is for machines which generate the exact clock. */
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#define USECS_PER_JIFFY (1000000/HZ)
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static unsigned long latch;
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static u32 m32r_gettimeoffset(void)
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{
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unsigned long elapsed_time = 0; /* [us] */
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#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
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|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
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|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
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#ifndef CONFIG_SMP
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unsigned long count;
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/* timer count may underflow right here */
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count = inl(M32R_MFT2CUT_PORTL);
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if (inl(M32R_ICU_CR18_PORTL) & 0x00000100) /* underflow check */
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count = 0;
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count = (latch - count) * TICK_SIZE;
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elapsed_time = DIV_ROUND_CLOSEST(count, latch);
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/* NOTE: LATCH is equal to the "interval" value (= reload count). */
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#else /* CONFIG_SMP */
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unsigned long count;
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static unsigned long p_jiffies = -1;
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static unsigned long p_count = 0;
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/* timer count may underflow right here */
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count = inl(M32R_MFT2CUT_PORTL);
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if (jiffies == p_jiffies && count > p_count)
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count = 0;
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p_jiffies = jiffies;
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p_count = count;
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count = (latch - count) * TICK_SIZE;
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elapsed_time = DIV_ROUND_CLOSEST(count, latch);
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/* NOTE: LATCH is equal to the "interval" value (= reload count). */
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#endif /* CONFIG_SMP */
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#elif defined(CONFIG_CHIP_M32310)
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#warning do_gettimeoffse not implemented
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#else
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#error no chip configuration
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#endif
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return elapsed_time * 1000;
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}
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "xtime_update()" routine every clocktick
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*/
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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#ifndef CONFIG_SMP
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profile_tick(CPU_PROFILING);
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#endif
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xtime_update(1);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(get_irq_regs()));
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#endif
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/* As we return to user mode fire off the other CPU schedulers..
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this is basically because we don't yet share IRQ's around.
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This message is rigged to be safe on the 386 - basically it's
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a hack, so don't look closely for now.. */
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#ifdef CONFIG_SMP
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smp_local_timer_interrupt();
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smp_send_timer();
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#endif
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return IRQ_HANDLED;
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.name = "MFT2",
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};
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void read_persistent_clock(struct timespec *ts)
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{
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unsigned int epoch, year, mon, day, hour, min, sec;
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sec = min = hour = day = mon = year = 0;
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epoch = 0;
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year = 23;
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mon = 4;
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day = 17;
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/* Attempt to guess the epoch. This is the same heuristic as in rtc.c
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so no stupid things will happen to timekeeping. Who knows, maybe
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Ultrix also uses 1952 as epoch ... */
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if (year > 10 && year < 44)
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epoch = 1980;
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else if (year < 96)
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epoch = 1952;
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year += epoch;
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ts->tv_sec = mktime(year, mon, day, hour, min, sec);
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ts->tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
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}
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void __init time_init(void)
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{
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arch_gettimeoffset = m32r_gettimeoffset;
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#if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
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|| defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
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|| defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
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/* M32102 MFT setup */
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setup_irq(M32R_IRQ_MFT2, &irq0);
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{
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unsigned long bus_clock;
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unsigned short divide;
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bus_clock = boot_cpu_data.bus_clock;
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divide = boot_cpu_data.timer_divide;
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latch = DIV_ROUND_CLOSEST(bus_clock/divide, HZ);
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printk("Timer start : latch = %ld\n", latch);
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outl((M32R_MFTMOD_CC_MASK | M32R_MFTMOD_TCCR \
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|M32R_MFTMOD_CSSEL011), M32R_MFT2MOD_PORTL);
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outl(latch, M32R_MFT2RLD_PORTL);
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outl(latch, M32R_MFT2CUT_PORTL);
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outl(0, M32R_MFT2CMPRLD_PORTL);
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outl((M32R_MFTCR_MFT2MSK|M32R_MFTCR_MFT2EN), M32R_MFTCR_PORTL);
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}
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#elif defined(CONFIG_CHIP_M32310)
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#warning time_init not implemented
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#else
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#error no chip configuration
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#endif
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}
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