282 lines
6.6 KiB
C
282 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_ATOMIC64_64_H
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#define _ASM_X86_ATOMIC64_64_H
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#include <linux/types.h>
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#include <asm/alternative.h>
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#include <asm/cmpxchg.h>
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/* The 64-bit atomic type */
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#define ATOMIC64_INIT(i) { (i) }
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/**
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* arch_atomic64_read - read atomic64 variable
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* @v: pointer of type atomic64_t
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*
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* Atomically reads the value of @v.
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* Doesn't imply a read memory barrier.
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*/
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static inline long arch_atomic64_read(const atomic64_t *v)
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{
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return READ_ONCE((v)->counter);
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}
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/**
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* arch_atomic64_set - set atomic64 variable
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* @v: pointer to type atomic64_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*/
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static inline void arch_atomic64_set(atomic64_t *v, long i)
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{
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WRITE_ONCE(v->counter, i);
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}
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/**
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* arch_atomic64_add - add integer to atomic64 variable
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* @i: integer value to add
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* @v: pointer to type atomic64_t
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*
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* Atomically adds @i to @v.
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*/
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static __always_inline void arch_atomic64_add(long i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "addq %1,%0"
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: "=m" (v->counter)
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: "er" (i), "m" (v->counter));
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}
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/**
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* arch_atomic64_sub - subtract the atomic64 variable
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* @i: integer value to subtract
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* @v: pointer to type atomic64_t
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*
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* Atomically subtracts @i from @v.
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*/
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static inline void arch_atomic64_sub(long i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "subq %1,%0"
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: "=m" (v->counter)
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: "er" (i), "m" (v->counter));
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}
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/**
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* arch_atomic64_sub_and_test - subtract value from variable and test result
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* @i: integer value to subtract
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* @v: pointer to type atomic64_t
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*
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* Atomically subtracts @i from @v and returns
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* true if the result is zero, or false for all
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* other cases.
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*/
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static inline bool arch_atomic64_sub_and_test(long i, atomic64_t *v)
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{
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GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, "er", i, "%0", e);
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}
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/**
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* arch_atomic64_inc - increment atomic64 variable
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* @v: pointer to type atomic64_t
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*
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* Atomically increments @v by 1.
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*/
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static __always_inline void arch_atomic64_inc(atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "incq %0"
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: "=m" (v->counter)
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: "m" (v->counter));
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}
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/**
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* arch_atomic64_dec - decrement atomic64 variable
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* @v: pointer to type atomic64_t
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*
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* Atomically decrements @v by 1.
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*/
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static __always_inline void arch_atomic64_dec(atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "decq %0"
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: "=m" (v->counter)
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: "m" (v->counter));
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}
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/**
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* arch_atomic64_dec_and_test - decrement and test
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* @v: pointer to type atomic64_t
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*
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* Atomically decrements @v by 1 and
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* returns true if the result is 0, or false for all other
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* cases.
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*/
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static inline bool arch_atomic64_dec_and_test(atomic64_t *v)
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{
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GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, "%0", e);
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}
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/**
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* arch_atomic64_inc_and_test - increment and test
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* @v: pointer to type atomic64_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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static inline bool arch_atomic64_inc_and_test(atomic64_t *v)
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{
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GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, "%0", e);
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}
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/**
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* arch_atomic64_add_negative - add and test if negative
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* @i: integer value to add
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* @v: pointer to type atomic64_t
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*
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* Atomically adds @i to @v and returns true
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* if the result is negative, or false when
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* result is greater than or equal to zero.
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*/
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static inline bool arch_atomic64_add_negative(long i, atomic64_t *v)
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{
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GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, "er", i, "%0", s);
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}
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/**
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* arch_atomic64_add_return - add and return
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* @i: integer value to add
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* @v: pointer to type atomic64_t
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static __always_inline long arch_atomic64_add_return(long i, atomic64_t *v)
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{
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return i + xadd(&v->counter, i);
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}
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static inline long arch_atomic64_sub_return(long i, atomic64_t *v)
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{
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return arch_atomic64_add_return(-i, v);
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}
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static inline long arch_atomic64_fetch_add(long i, atomic64_t *v)
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{
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return xadd(&v->counter, i);
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}
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static inline long arch_atomic64_fetch_sub(long i, atomic64_t *v)
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{
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return xadd(&v->counter, -i);
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}
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#define arch_atomic64_inc_return(v) (arch_atomic64_add_return(1, (v)))
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#define arch_atomic64_dec_return(v) (arch_atomic64_sub_return(1, (v)))
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static inline long arch_atomic64_cmpxchg(atomic64_t *v, long old, long new)
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{
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return arch_cmpxchg(&v->counter, old, new);
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}
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#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg
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static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, long new)
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{
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return try_cmpxchg(&v->counter, old, new);
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}
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static inline long arch_atomic64_xchg(atomic64_t *v, long new)
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{
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return xchg(&v->counter, new);
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}
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/**
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* arch_atomic64_add_unless - add unless the number is a given value
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* @v: pointer of type atomic64_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns the old value of @v.
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*/
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static inline bool arch_atomic64_add_unless(atomic64_t *v, long a, long u)
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{
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s64 c = arch_atomic64_read(v);
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do {
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if (unlikely(c == u))
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return false;
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} while (!arch_atomic64_try_cmpxchg(v, &c, c + a));
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return true;
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}
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#define arch_atomic64_inc_not_zero(v) arch_atomic64_add_unless((v), 1, 0)
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/*
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* arch_atomic64_dec_if_positive - decrement by 1 if old value positive
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* @v: pointer of type atomic_t
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*
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* The function returns the old value of *v minus 1, even if
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* the atomic variable, v, was not decremented.
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*/
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static inline long arch_atomic64_dec_if_positive(atomic64_t *v)
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{
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s64 dec, c = arch_atomic64_read(v);
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do {
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dec = c - 1;
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if (unlikely(dec < 0))
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break;
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} while (!arch_atomic64_try_cmpxchg(v, &c, dec));
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return dec;
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}
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static inline void arch_atomic64_and(long i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "andq %1,%0"
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: "+m" (v->counter)
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: "er" (i)
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: "memory");
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}
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static inline long arch_atomic64_fetch_and(long i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read(v);
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do {
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} while (!arch_atomic64_try_cmpxchg(v, &val, val & i));
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return val;
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}
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static inline void arch_atomic64_or(long i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "orq %1,%0"
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: "+m" (v->counter)
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: "er" (i)
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: "memory");
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}
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static inline long arch_atomic64_fetch_or(long i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read(v);
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do {
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} while (!arch_atomic64_try_cmpxchg(v, &val, val | i));
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return val;
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}
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static inline void arch_atomic64_xor(long i, atomic64_t *v)
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{
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asm volatile(LOCK_PREFIX "xorq %1,%0"
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: "+m" (v->counter)
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: "er" (i)
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: "memory");
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}
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static inline long arch_atomic64_fetch_xor(long i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read(v);
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do {
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} while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i));
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return val;
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}
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#endif /* _ASM_X86_ATOMIC64_64_H */
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