225ae5fd9a
The CBUS UART's interrupt number was wrong conflicting with the interrupt being tied to the Intel PIIX4. Since the PIIX4's interrupt is registered before the CBUS UART which is not being used on most systems this would not be noticed. Attempts to open the ttyS2 CBUS UART would result in: genirq: Flags mismatch irq 18. 00000000 (serial) vs. 00010000 (XT-PIC cascade) serial_link_irq_chain: request failed: -16 for irq: 18 Qemu was written to match the kernel so will need to be fixed also. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
||
|---|---|---|
| .. | ||
| Makefile | ||
| Platform | ||
| malta-amon.c | ||
| malta-cmdline.c | ||
| malta-console.c | ||
| malta-display.c | ||
| malta-init.c | ||
| malta-int.c | ||
| malta-memory.c | ||
| malta-pci.c | ||
| malta-platform.c | ||
| malta-reset.c | ||
| malta-setup.c | ||
| malta-smtc.c | ||
| malta-time.c | ||