166 lines
4.0 KiB
C
166 lines
4.0 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/pm.h>
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#include <linux/export.h>
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#include <linux/delay.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <asm/reboot.h>
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#include <lantiq_soc.h>
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#include "../prom.h"
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#define ltq_rcu_w32(x, y) ltq_w32((x), ltq_rcu_membase + (y))
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#define ltq_rcu_r32(x) ltq_r32(ltq_rcu_membase + (x))
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/* reset request register */
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#define RCU_RST_REQ 0x0010
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/* reset status register */
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#define RCU_RST_STAT 0x0014
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/* vr9 gphy registers */
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#define RCU_GFS_ADD0_XRX200 0x0020
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#define RCU_GFS_ADD1_XRX200 0x0068
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/* reboot bit */
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#define RCU_RD_GPHY0_XRX200 BIT(31)
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#define RCU_RD_SRST BIT(30)
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#define RCU_RD_GPHY1_XRX200 BIT(29)
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/* reset cause */
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#define RCU_STAT_SHIFT 26
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/* boot selection */
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#define RCU_BOOT_SEL(x) ((x >> 18) & 0x7)
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#define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10))
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/* remapped base addr of the reset control unit */
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static void __iomem *ltq_rcu_membase;
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static struct device_node *ltq_rcu_np;
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/* This function is used by the watchdog driver */
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int ltq_reset_cause(void)
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{
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u32 val = ltq_rcu_r32(RCU_RST_STAT);
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return val >> RCU_STAT_SHIFT;
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}
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EXPORT_SYMBOL_GPL(ltq_reset_cause);
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/* allow platform code to find out what source we booted from */
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unsigned char ltq_boot_select(void)
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{
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u32 val = ltq_rcu_r32(RCU_RST_STAT);
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if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200"))
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return RCU_BOOT_SEL_XRX200(val);
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return RCU_BOOT_SEL(val);
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}
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/* reset / boot a gphy */
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static struct ltq_xrx200_gphy_reset {
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u32 rd;
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u32 addr;
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} xrx200_gphy[] = {
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{RCU_RD_GPHY0_XRX200, RCU_GFS_ADD0_XRX200},
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{RCU_RD_GPHY1_XRX200, RCU_GFS_ADD1_XRX200},
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};
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/* reset and boot a gphy. these phys only exist on xrx200 SoC */
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int xrx200_gphy_boot(struct device *dev, unsigned int id, dma_addr_t dev_addr)
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{
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struct clk *clk;
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if (!of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) {
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dev_err(dev, "this SoC has no GPHY\n");
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return -EINVAL;
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}
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clk = clk_get_sys("1f203000.rcu", "gphy");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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clk_enable(clk);
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if (id > 1) {
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dev_err(dev, "%u is an invalid gphy id\n", id);
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return -EINVAL;
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}
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dev_info(dev, "booting GPHY%u firmware at %X\n", id, dev_addr);
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ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | xrx200_gphy[id].rd,
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RCU_RST_REQ);
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ltq_rcu_w32(dev_addr, xrx200_gphy[id].addr);
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ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~xrx200_gphy[id].rd,
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RCU_RST_REQ);
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return 0;
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}
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/* reset a io domain for u micro seconds */
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void ltq_reset_once(unsigned int module, ulong u)
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{
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ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
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udelay(u);
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ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ);
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}
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static void ltq_machine_restart(char *command)
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{
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local_irq_disable();
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ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | RCU_RD_SRST, RCU_RST_REQ);
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unreachable();
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}
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static void ltq_machine_halt(void)
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{
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local_irq_disable();
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unreachable();
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}
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static void ltq_machine_power_off(void)
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{
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local_irq_disable();
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unreachable();
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}
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static int __init mips_reboot_setup(void)
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{
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struct resource res;
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ltq_rcu_np = of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway");
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if (!ltq_rcu_np)
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ltq_rcu_np = of_find_compatible_node(NULL, NULL,
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"lantiq,rcu-xrx200");
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/* check if all the reset register range is available */
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if (!ltq_rcu_np)
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panic("Failed to load reset resources from devicetree");
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if (of_address_to_resource(ltq_rcu_np, 0, &res))
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panic("Failed to get rcu memory range");
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if (request_mem_region(res.start, resource_size(&res), res.name) < 0)
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pr_err("Failed to request rcu memory");
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ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&res));
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if (!ltq_rcu_membase)
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panic("Failed to remap core memory");
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_machine_restart = ltq_machine_restart;
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_machine_halt = ltq_machine_halt;
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pm_power_off = ltq_machine_power_off;
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return 0;
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}
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arch_initcall(mips_reboot_setup);
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