737 lines
20 KiB
C
737 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Dynamic DMA mapping support.
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*
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* This implementation is a fallback for platforms that do not support
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* I/O TLBs (aka DMA address translation hardware).
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* Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
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* Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
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* Copyright (C) 2000, 2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
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* 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
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* unnecessary i-cache flushing.
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* 04/07/.. ak Better overflow handling. Assorted fixes.
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* 05/09/10 linville Add support for syncing ranges, support syncing for
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* DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
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* 08/12/11 beckyb Add highmem support
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*/
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#define pr_fmt(fmt) "software IO TLB: " fmt
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#include <linux/cache.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-map-ops.h>
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#include <linux/mm.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/swiotlb.h>
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#include <linux/pfn.h>
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#include <linux/types.h>
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#include <linux/ctype.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <linux/scatterlist.h>
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#include <linux/mem_encrypt.h>
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#include <linux/set_memory.h>
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#endif
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#include <asm/io.h>
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#include <asm/dma.h>
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#include <linux/init.h>
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#include <linux/memblock.h>
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#include <linux/iommu-helper.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/swiotlb.h>
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#define OFFSET(val,align) ((unsigned long) \
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( (val) & ( (align) - 1)))
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#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
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/*
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* Minimum IO TLB size to bother booting with. Systems with mainly
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* 64bit capable cards will only lightly use the swiotlb. If we can't
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* allocate a contiguous 1MB, we're probably in trouble anyway.
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*/
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#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
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enum swiotlb_force swiotlb_force;
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/*
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* Used to do a quick range check in swiotlb_tbl_unmap_single and
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* swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
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* API.
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*/
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phys_addr_t io_tlb_start, io_tlb_end;
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/*
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* The number of IO TLB blocks (in groups of 64) between io_tlb_start and
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* io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
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*/
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static unsigned long io_tlb_nslabs;
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/*
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* The number of used IO TLB block
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*/
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static unsigned long io_tlb_used;
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/*
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* This is a free list describing the number of free entries available from
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* each index
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*/
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static unsigned int *io_tlb_list;
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static unsigned int io_tlb_index;
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/*
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* Max segment that we can provide which (if pages are contingous) will
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* not be bounced (unless SWIOTLB_FORCE is set).
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*/
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static unsigned int max_segment;
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/*
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* We need to save away the original address corresponding to a mapped entry
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* for the sync operations.
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*/
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#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
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static phys_addr_t *io_tlb_orig_addr;
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/*
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* Protect the above data structures in the map and unmap calls
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*/
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static DEFINE_SPINLOCK(io_tlb_lock);
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static int late_alloc;
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static int __init
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setup_io_tlb_npages(char *str)
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{
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if (isdigit(*str)) {
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io_tlb_nslabs = simple_strtoul(str, &str, 0);
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/* avoid tail segment of size < IO_TLB_SEGSIZE */
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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if (*str == ',')
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++str;
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if (!strcmp(str, "force")) {
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swiotlb_force = SWIOTLB_FORCE;
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} else if (!strcmp(str, "noforce")) {
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swiotlb_force = SWIOTLB_NO_FORCE;
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io_tlb_nslabs = 1;
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}
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return 0;
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}
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early_param("swiotlb", setup_io_tlb_npages);
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static bool no_iotlb_memory;
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unsigned long swiotlb_nr_tbl(void)
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{
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return unlikely(no_iotlb_memory) ? 0 : io_tlb_nslabs;
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}
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EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
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unsigned int swiotlb_max_segment(void)
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{
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return unlikely(no_iotlb_memory) ? 0 : max_segment;
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}
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EXPORT_SYMBOL_GPL(swiotlb_max_segment);
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void swiotlb_set_max_segment(unsigned int val)
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{
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if (swiotlb_force == SWIOTLB_FORCE)
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max_segment = 1;
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else
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max_segment = rounddown(val, PAGE_SIZE);
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}
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unsigned long swiotlb_size_or_default(void)
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{
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unsigned long size;
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size = io_tlb_nslabs << IO_TLB_SHIFT;
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return size ? size : (IO_TLB_DEFAULT_SIZE);
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}
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void __init swiotlb_adjust_size(unsigned long new_size)
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{
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unsigned long size;
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/*
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* If swiotlb parameter has not been specified, give a chance to
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* architectures such as those supporting memory encryption to
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* adjust/expand SWIOTLB size for their use.
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*/
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if (!io_tlb_nslabs) {
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size = ALIGN(new_size, 1 << IO_TLB_SHIFT);
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io_tlb_nslabs = size >> IO_TLB_SHIFT;
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20);
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}
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}
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void swiotlb_print_info(void)
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{
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unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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if (no_iotlb_memory) {
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pr_warn("No low mem\n");
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return;
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}
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pr_info("mapped [mem %pa-%pa] (%luMB)\n", &io_tlb_start, &io_tlb_end,
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bytes >> 20);
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}
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/*
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* Early SWIOTLB allocation may be too early to allow an architecture to
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* perform the desired operations. This function allows the architecture to
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* call SWIOTLB when the operations are possible. It needs to be called
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* before the SWIOTLB memory is used.
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*/
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void __init swiotlb_update_mem_attributes(void)
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{
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void *vaddr;
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unsigned long bytes;
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if (no_iotlb_memory || late_alloc)
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return;
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vaddr = phys_to_virt(io_tlb_start);
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bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
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set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
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memset(vaddr, 0, bytes);
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}
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int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
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{
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unsigned long i, bytes;
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size_t alloc_size;
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bytes = nslabs << IO_TLB_SHIFT;
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io_tlb_nslabs = nslabs;
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io_tlb_start = __pa(tlb);
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io_tlb_end = io_tlb_start + bytes;
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int));
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io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE);
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if (!io_tlb_list)
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panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
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__func__, alloc_size, PAGE_SIZE);
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alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t));
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io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE);
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if (!io_tlb_orig_addr)
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panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
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__func__, alloc_size, PAGE_SIZE);
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for (i = 0; i < io_tlb_nslabs; i++) {
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
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}
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io_tlb_index = 0;
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no_iotlb_memory = false;
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if (verbose)
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swiotlb_print_info();
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swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
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return 0;
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}
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/*
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* Statically reserve bounce buffer space and initialize bounce buffer data
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* structures for the software IO TLB used to implement the DMA API.
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*/
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void __init
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swiotlb_init(int verbose)
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{
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size_t default_size = IO_TLB_DEFAULT_SIZE;
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unsigned char *vstart;
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unsigned long bytes;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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/* Get IO TLB memory from the low pages */
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vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE);
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if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
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return;
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if (io_tlb_start) {
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memblock_free_early(io_tlb_start,
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PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
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io_tlb_start = 0;
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}
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pr_warn("Cannot allocate buffer");
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no_iotlb_memory = true;
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}
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/*
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* Systems with larger DMA zones (those that don't support ISA) can
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* initialize the swiotlb later using the slab allocator if needed.
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* This should be just like above, but with some error catching.
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*/
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int
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swiotlb_late_init_with_default_size(size_t default_size)
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{
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unsigned long bytes, req_nslabs = io_tlb_nslabs;
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unsigned char *vstart = NULL;
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unsigned int order;
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int rc = 0;
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if (!io_tlb_nslabs) {
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io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
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io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
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}
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/*
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* Get IO TLB memory from the low pages
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*/
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order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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bytes = io_tlb_nslabs << IO_TLB_SHIFT;
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while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
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vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
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order);
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if (vstart)
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break;
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order--;
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}
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if (!vstart) {
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io_tlb_nslabs = req_nslabs;
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return -ENOMEM;
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}
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if (order != get_order(bytes)) {
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pr_warn("only able to allocate %ld MB\n",
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(PAGE_SIZE << order) >> 20);
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io_tlb_nslabs = SLABS_PER_PAGE << order;
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}
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rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
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if (rc)
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free_pages((unsigned long)vstart, order);
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return rc;
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}
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static void swiotlb_cleanup(void)
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{
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io_tlb_end = 0;
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io_tlb_start = 0;
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io_tlb_nslabs = 0;
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max_segment = 0;
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}
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int
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swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
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{
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unsigned long i, bytes;
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bytes = nslabs << IO_TLB_SHIFT;
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io_tlb_nslabs = nslabs;
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io_tlb_start = virt_to_phys(tlb);
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io_tlb_end = io_tlb_start + bytes;
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set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
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memset(tlb, 0, bytes);
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/*
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* Allocate and initialize the free list array. This array is used
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* to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
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* between io_tlb_start and io_tlb_end.
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*/
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io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs * sizeof(int)));
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if (!io_tlb_list)
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goto cleanup3;
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io_tlb_orig_addr = (phys_addr_t *)
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__get_free_pages(GFP_KERNEL,
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get_order(io_tlb_nslabs *
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sizeof(phys_addr_t)));
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if (!io_tlb_orig_addr)
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goto cleanup4;
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for (i = 0; i < io_tlb_nslabs; i++) {
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io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
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io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
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}
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io_tlb_index = 0;
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no_iotlb_memory = false;
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swiotlb_print_info();
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late_alloc = 1;
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swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
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return 0;
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cleanup4:
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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io_tlb_list = NULL;
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cleanup3:
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swiotlb_cleanup();
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return -ENOMEM;
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}
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void __init swiotlb_exit(void)
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{
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if (!io_tlb_orig_addr)
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return;
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if (late_alloc) {
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free_pages((unsigned long)io_tlb_orig_addr,
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get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
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free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
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sizeof(int)));
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free_pages((unsigned long)phys_to_virt(io_tlb_start),
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get_order(io_tlb_nslabs << IO_TLB_SHIFT));
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} else {
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memblock_free_late(__pa(io_tlb_orig_addr),
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PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
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memblock_free_late(__pa(io_tlb_list),
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PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
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memblock_free_late(io_tlb_start,
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PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
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}
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swiotlb_cleanup();
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}
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/*
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* Bounce: copy the swiotlb buffer from or back to the original dma location
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*/
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static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
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size_t size, enum dma_data_direction dir)
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{
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unsigned long pfn = PFN_DOWN(orig_addr);
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unsigned char *vaddr = phys_to_virt(tlb_addr);
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if (PageHighMem(pfn_to_page(pfn))) {
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/* The buffer does not have a mapping. Map it in and copy */
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unsigned int offset = orig_addr & ~PAGE_MASK;
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char *buffer;
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unsigned int sz = 0;
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unsigned long flags;
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while (size) {
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sz = min_t(size_t, PAGE_SIZE - offset, size);
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local_irq_save(flags);
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buffer = kmap_atomic(pfn_to_page(pfn));
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if (dir == DMA_TO_DEVICE)
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memcpy(vaddr, buffer + offset, sz);
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else
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memcpy(buffer + offset, vaddr, sz);
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kunmap_atomic(buffer);
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local_irq_restore(flags);
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size -= sz;
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pfn++;
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vaddr += sz;
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offset = 0;
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}
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} else if (dir == DMA_TO_DEVICE) {
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memcpy(vaddr, phys_to_virt(orig_addr), size);
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} else {
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memcpy(phys_to_virt(orig_addr), vaddr, size);
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}
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}
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phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, phys_addr_t orig_addr,
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size_t mapping_size, size_t alloc_size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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dma_addr_t tbl_dma_addr = phys_to_dma_unencrypted(hwdev, io_tlb_start);
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unsigned long flags;
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phys_addr_t tlb_addr;
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unsigned int nslots, stride, index, wrap;
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int i;
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unsigned long mask;
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unsigned long offset_slots;
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unsigned long max_slots;
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unsigned long tmp_io_tlb_used;
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if (no_iotlb_memory)
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panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
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if (mem_encrypt_active())
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pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
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if (mapping_size > alloc_size) {
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dev_warn_once(hwdev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
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mapping_size, alloc_size);
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return (phys_addr_t)DMA_MAPPING_ERROR;
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}
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mask = dma_get_seg_boundary(hwdev);
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tbl_dma_addr &= mask;
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offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
|
|
/*
|
|
* Carefully handle integer overflow which can occur when mask == ~0UL.
|
|
*/
|
|
max_slots = mask + 1
|
|
? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
|
|
: 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
|
|
|
|
/*
|
|
* For mappings greater than or equal to a page, we limit the stride
|
|
* (and hence alignment) to a page size.
|
|
*/
|
|
nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
if (alloc_size >= PAGE_SIZE)
|
|
stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
|
|
else
|
|
stride = 1;
|
|
|
|
BUG_ON(!nslots);
|
|
|
|
/*
|
|
* Find suitable number of IO TLB entries size that will fit this
|
|
* request and allocate a buffer from that IO TLB pool.
|
|
*/
|
|
spin_lock_irqsave(&io_tlb_lock, flags);
|
|
|
|
if (unlikely(nslots > io_tlb_nslabs - io_tlb_used))
|
|
goto not_found;
|
|
|
|
index = ALIGN(io_tlb_index, stride);
|
|
if (index >= io_tlb_nslabs)
|
|
index = 0;
|
|
wrap = index;
|
|
|
|
do {
|
|
while (iommu_is_span_boundary(index, nslots, offset_slots,
|
|
max_slots)) {
|
|
index += stride;
|
|
if (index >= io_tlb_nslabs)
|
|
index = 0;
|
|
if (index == wrap)
|
|
goto not_found;
|
|
}
|
|
|
|
/*
|
|
* If we find a slot that indicates we have 'nslots' number of
|
|
* contiguous buffers, we allocate the buffers from that slot
|
|
* and mark the entries as '0' indicating unavailable.
|
|
*/
|
|
if (io_tlb_list[index] >= nslots) {
|
|
int count = 0;
|
|
|
|
for (i = index; i < (int) (index + nslots); i++)
|
|
io_tlb_list[i] = 0;
|
|
for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
|
|
io_tlb_list[i] = ++count;
|
|
tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
|
|
|
|
/*
|
|
* Update the indices to avoid searching in the next
|
|
* round.
|
|
*/
|
|
io_tlb_index = ((index + nslots) < io_tlb_nslabs
|
|
? (index + nslots) : 0);
|
|
|
|
goto found;
|
|
}
|
|
index += stride;
|
|
if (index >= io_tlb_nslabs)
|
|
index = 0;
|
|
} while (index != wrap);
|
|
|
|
not_found:
|
|
tmp_io_tlb_used = io_tlb_used;
|
|
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
|
|
dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
|
|
alloc_size, io_tlb_nslabs, tmp_io_tlb_used);
|
|
return (phys_addr_t)DMA_MAPPING_ERROR;
|
|
found:
|
|
io_tlb_used += nslots;
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
|
|
/*
|
|
* Save away the mapping from the original address to the DMA address.
|
|
* This is needed when we sync the memory. Then we sync the buffer if
|
|
* needed.
|
|
*/
|
|
for (i = 0; i < nslots; i++)
|
|
io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
|
|
if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
|
|
(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_TO_DEVICE);
|
|
|
|
return tlb_addr;
|
|
}
|
|
|
|
/*
|
|
* tlb_addr is the physical address of the bounce buffer to unmap.
|
|
*/
|
|
void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
|
|
size_t mapping_size, size_t alloc_size,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
unsigned long flags;
|
|
int i, count, nslots = ALIGN(alloc_size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
|
|
int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
|
|
phys_addr_t orig_addr = io_tlb_orig_addr[index];
|
|
|
|
/*
|
|
* First, sync the memory before unmapping the entry
|
|
*/
|
|
if (orig_addr != INVALID_PHYS_ADDR &&
|
|
!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
|
|
((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
|
|
swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_FROM_DEVICE);
|
|
|
|
/*
|
|
* Return the buffer to the free list by setting the corresponding
|
|
* entries to indicate the number of contiguous entries available.
|
|
* While returning the entries to the free list, we merge the entries
|
|
* with slots below and above the pool being returned.
|
|
*/
|
|
spin_lock_irqsave(&io_tlb_lock, flags);
|
|
{
|
|
count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
|
|
io_tlb_list[index + nslots] : 0);
|
|
/*
|
|
* Step 1: return the slots to the free list, merging the
|
|
* slots with superceeding slots
|
|
*/
|
|
for (i = index + nslots - 1; i >= index; i--) {
|
|
io_tlb_list[i] = ++count;
|
|
io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
|
|
}
|
|
/*
|
|
* Step 2: merge the returned slots with the preceding slots,
|
|
* if available (non zero)
|
|
*/
|
|
for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
|
|
io_tlb_list[i] = ++count;
|
|
|
|
io_tlb_used -= nslots;
|
|
}
|
|
spin_unlock_irqrestore(&io_tlb_lock, flags);
|
|
}
|
|
|
|
void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
|
|
size_t size, enum dma_data_direction dir,
|
|
enum dma_sync_target target)
|
|
{
|
|
int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
|
|
phys_addr_t orig_addr = io_tlb_orig_addr[index];
|
|
|
|
if (orig_addr == INVALID_PHYS_ADDR)
|
|
return;
|
|
orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
|
|
|
|
switch (target) {
|
|
case SYNC_FOR_CPU:
|
|
if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(orig_addr, tlb_addr,
|
|
size, DMA_FROM_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_TO_DEVICE);
|
|
break;
|
|
case SYNC_FOR_DEVICE:
|
|
if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
|
|
swiotlb_bounce(orig_addr, tlb_addr,
|
|
size, DMA_TO_DEVICE);
|
|
else
|
|
BUG_ON(dir != DMA_FROM_DEVICE);
|
|
break;
|
|
default:
|
|
BUG();
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
|
|
* to the device copy the data into it as well.
|
|
*/
|
|
dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
|
|
enum dma_data_direction dir, unsigned long attrs)
|
|
{
|
|
phys_addr_t swiotlb_addr;
|
|
dma_addr_t dma_addr;
|
|
|
|
trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
|
|
swiotlb_force);
|
|
|
|
swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, dir,
|
|
attrs);
|
|
if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
|
|
return DMA_MAPPING_ERROR;
|
|
|
|
/* Ensure that the address returned is DMA'ble */
|
|
dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
|
|
if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
|
|
swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, size, dir,
|
|
attrs | DMA_ATTR_SKIP_CPU_SYNC);
|
|
dev_WARN_ONCE(dev, 1,
|
|
"swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
|
|
&dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
|
|
return DMA_MAPPING_ERROR;
|
|
}
|
|
|
|
if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
|
|
arch_sync_dma_for_device(swiotlb_addr, size, dir);
|
|
return dma_addr;
|
|
}
|
|
|
|
size_t swiotlb_max_mapping_size(struct device *dev)
|
|
{
|
|
return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
|
|
}
|
|
|
|
bool is_swiotlb_active(void)
|
|
{
|
|
/*
|
|
* When SWIOTLB is initialized, even if io_tlb_start points to physical
|
|
* address zero, io_tlb_end surely doesn't.
|
|
*/
|
|
return io_tlb_end != 0;
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
static int __init swiotlb_create_debugfs(void)
|
|
{
|
|
struct dentry *root;
|
|
|
|
root = debugfs_create_dir("swiotlb", NULL);
|
|
debugfs_create_ulong("io_tlb_nslabs", 0400, root, &io_tlb_nslabs);
|
|
debugfs_create_ulong("io_tlb_used", 0400, root, &io_tlb_used);
|
|
return 0;
|
|
}
|
|
|
|
late_initcall(swiotlb_create_debugfs);
|
|
|
|
#endif
|