798 lines
19 KiB
C
798 lines
19 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 - 1999, 2000 by Ralf Baechle and others.
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* Copyright (C) 2005, 2006 by Ralf Baechle (ralf@linux-mips.org)
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2004 Thiemo Seufer
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* Copyright (C) 2013 Imagination Technologies Ltd.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/sched/debug.h>
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#include <linux/sched/task.h>
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#include <linux/sched/task_stack.h>
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#include <linux/tick.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/export.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/personality.h>
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#include <linux/sys.h>
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#include <linux/init.h>
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#include <linux/completion.h>
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#include <linux/kallsyms.h>
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#include <linux/random.h>
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#include <linux/prctl.h>
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#include <asm/asm.h>
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#include <asm/bootinfo.h>
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#include <asm/cpu.h>
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#include <asm/dsemul.h>
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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#include <asm/irq.h>
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#include <asm/msa.h>
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#include <asm/pgtable.h>
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#include <asm/mipsregs.h>
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#include <asm/processor.h>
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#include <asm/reg.h>
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#include <linux/uaccess.h>
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#include <asm/io.h>
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#include <asm/elf.h>
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#include <asm/isadep.h>
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#include <asm/inst.h>
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#include <asm/stacktrace.h>
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#include <asm/irq_regs.h>
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#ifdef CONFIG_HOTPLUG_CPU
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void arch_cpu_idle_dead(void)
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{
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play_dead();
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}
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#endif
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asmlinkage void ret_from_fork(void);
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asmlinkage void ret_from_kernel_thread(void);
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void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
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{
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unsigned long status;
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/* New thread loses kernel privileges. */
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status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
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status |= KU_USER;
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regs->cp0_status = status;
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lose_fpu(0);
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clear_thread_flag(TIF_MSA_CTX_LIVE);
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clear_used_math();
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atomic_set(¤t->thread.bd_emu_frame, BD_EMUFRAME_NONE);
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init_dsp();
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regs->cp0_epc = pc;
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regs->regs[29] = sp;
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}
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void exit_thread(struct task_struct *tsk)
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{
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/*
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* User threads may have allocated a delay slot emulation frame.
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* If so, clean up that allocation.
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*/
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if (!(current->flags & PF_KTHREAD))
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dsemul_thread_cleanup(tsk);
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}
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int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
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{
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/*
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* Save any process state which is live in hardware registers to the
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* parent context prior to duplication. This prevents the new child
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* state becoming stale if the parent is preempted before copy_thread()
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* gets a chance to save the parent's live hardware registers to the
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* child context.
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*/
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preempt_disable();
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if (is_msa_enabled())
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save_msa(current);
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else if (is_fpu_owner())
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_save_fp(current);
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save_dsp(current);
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preempt_enable();
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*dst = *src;
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return 0;
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}
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/*
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* Copy architecture-specific thread state
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*/
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int copy_thread_tls(unsigned long clone_flags, unsigned long usp,
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unsigned long kthread_arg, struct task_struct *p, unsigned long tls)
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{
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struct thread_info *ti = task_thread_info(p);
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struct pt_regs *childregs, *regs = current_pt_regs();
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unsigned long childksp;
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childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
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/* set up new TSS. */
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childregs = (struct pt_regs *) childksp - 1;
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/* Put the stack after the struct pt_regs. */
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childksp = (unsigned long) childregs;
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p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
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if (unlikely(p->flags & PF_KTHREAD)) {
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/* kernel thread */
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unsigned long status = p->thread.cp0_status;
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memset(childregs, 0, sizeof(struct pt_regs));
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ti->addr_limit = KERNEL_DS;
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p->thread.reg16 = usp; /* fn */
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p->thread.reg17 = kthread_arg;
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p->thread.reg29 = childksp;
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p->thread.reg31 = (unsigned long) ret_from_kernel_thread;
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#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) |
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((status & (ST0_KUC | ST0_IEC)) << 2);
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#else
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status |= ST0_EXL;
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#endif
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childregs->cp0_status = status;
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return 0;
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}
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/* user thread */
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*childregs = *regs;
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childregs->regs[7] = 0; /* Clear error flag */
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childregs->regs[2] = 0; /* Child gets zero as return value */
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if (usp)
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childregs->regs[29] = usp;
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ti->addr_limit = USER_DS;
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p->thread.reg29 = (unsigned long) childregs;
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p->thread.reg31 = (unsigned long) ret_from_fork;
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/*
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* New tasks lose permission to use the fpu. This accelerates context
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* switching for most programs since they don't use the fpu.
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*/
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childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
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clear_tsk_thread_flag(p, TIF_USEDFPU);
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clear_tsk_thread_flag(p, TIF_USEDMSA);
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clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
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#ifdef CONFIG_MIPS_MT_FPAFF
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clear_tsk_thread_flag(p, TIF_FPUBOUND);
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#endif /* CONFIG_MIPS_MT_FPAFF */
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atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
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if (clone_flags & CLONE_SETTLS)
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ti->tp_value = tls;
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return 0;
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}
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#ifdef CONFIG_CC_STACKPROTECTOR
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#include <linux/stackprotector.h>
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unsigned long __stack_chk_guard __read_mostly;
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EXPORT_SYMBOL(__stack_chk_guard);
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#endif
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struct mips_frame_info {
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void *func;
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unsigned long func_size;
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int frame_size;
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int pc_offset;
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};
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#define J_TARGET(pc,target) \
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(((unsigned long)(pc) & 0xf0000000) | ((target) << 2))
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static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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/*
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* swsp ra,offset
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* swm16 reglist,offset(sp)
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* swm32 reglist,offset(sp)
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* sw32 ra,offset(sp)
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* jradiussp - NOT SUPPORTED
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*
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* microMIPS is way more fun...
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*/
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if (mm_insn_16bit(ip->halfword[1])) {
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switch (ip->mm16_r5_format.opcode) {
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case mm_swsp16_op:
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if (ip->mm16_r5_format.rt != 31)
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return 0;
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*poff = ip->mm16_r5_format.simmediate;
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*poff = (*poff << 2) / sizeof(ulong);
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return 1;
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case mm_pool16c_op:
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switch (ip->mm16_m_format.func) {
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case mm_swm16_op:
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*poff = ip->mm16_m_format.imm;
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*poff += 1 + ip->mm16_m_format.rlist;
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*poff = (*poff << 2) / sizeof(ulong);
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return 1;
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default:
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return 0;
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}
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default:
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return 0;
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}
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}
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switch (ip->i_format.opcode) {
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case mm_sw32_op:
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if (ip->i_format.rs != 29)
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return 0;
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if (ip->i_format.rt != 31)
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return 0;
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*poff = ip->i_format.simmediate / sizeof(ulong);
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return 1;
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case mm_pool32b_op:
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switch (ip->mm_m_format.func) {
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case mm_swm32_func:
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if (ip->mm_m_format.rd < 0x10)
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return 0;
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if (ip->mm_m_format.base != 29)
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return 0;
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*poff = ip->mm_m_format.simmediate;
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*poff += (ip->mm_m_format.rd & 0xf) * sizeof(u32);
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*poff /= sizeof(ulong);
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return 1;
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default:
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return 0;
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}
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default:
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return 0;
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}
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#else
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/* sw / sd $ra, offset($sp) */
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if ((ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) &&
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ip->i_format.rs == 29 && ip->i_format.rt == 31) {
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*poff = ip->i_format.simmediate / sizeof(ulong);
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return 1;
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}
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return 0;
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#endif
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}
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static inline int is_jump_ins(union mips_instruction *ip)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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/*
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* jr16,jrc,jalr16,jalr16
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* jal
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* jalr/jr,jalr.hb/jr.hb,jalrs,jalrs.hb
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* jraddiusp - NOT SUPPORTED
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*
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* microMIPS is kind of more fun...
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*/
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if (mm_insn_16bit(ip->halfword[1])) {
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if ((ip->mm16_r5_format.opcode == mm_pool16c_op &&
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(ip->mm16_r5_format.rt & mm_jr16_op) == mm_jr16_op))
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return 1;
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return 0;
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}
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if (ip->j_format.opcode == mm_j32_op)
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return 1;
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if (ip->j_format.opcode == mm_jal32_op)
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return 1;
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if (ip->r_format.opcode != mm_pool32a_op ||
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ip->r_format.func != mm_pool32axf_op)
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return 0;
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return ((ip->u_format.uimmediate >> 6) & mm_jalr_op) == mm_jalr_op;
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#else
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if (ip->j_format.opcode == j_op)
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return 1;
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if (ip->j_format.opcode == jal_op)
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return 1;
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if (ip->r_format.opcode != spec_op)
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return 0;
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return ip->r_format.func == jalr_op || ip->r_format.func == jr_op;
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#endif
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}
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static inline int is_sp_move_ins(union mips_instruction *ip)
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{
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#ifdef CONFIG_CPU_MICROMIPS
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/*
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* addiusp -imm
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* addius5 sp,-imm
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* addiu32 sp,sp,-imm
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* jradiussp - NOT SUPPORTED
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*
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* microMIPS is not more fun...
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*/
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if (mm_insn_16bit(ip->halfword[1])) {
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return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
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ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
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(ip->mm16_r5_format.opcode == mm_pool16d_op &&
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ip->mm16_r5_format.rt == 29);
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}
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return ip->mm_i_format.opcode == mm_addiu32_op &&
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ip->mm_i_format.rt == 29 && ip->mm_i_format.rs == 29;
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#else
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/* addiu/daddiu sp,sp,-imm */
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if (ip->i_format.rs != 29 || ip->i_format.rt != 29)
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return 0;
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if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op)
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return 1;
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#endif
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return 0;
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}
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static int get_frame_info(struct mips_frame_info *info)
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{
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bool is_mmips = IS_ENABLED(CONFIG_CPU_MICROMIPS);
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union mips_instruction insn, *ip, *ip_end;
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const unsigned int max_insns = 128;
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unsigned int i;
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info->pc_offset = -1;
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info->frame_size = 0;
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ip = (void *)msk_isa16_mode((ulong)info->func);
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if (!ip)
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goto err;
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ip_end = (void *)ip + info->func_size;
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for (i = 0; i < max_insns && ip < ip_end; i++, ip++) {
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if (is_mmips && mm_insn_16bit(ip->halfword[0])) {
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insn.halfword[0] = 0;
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insn.halfword[1] = ip->halfword[0];
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} else if (is_mmips) {
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insn.halfword[0] = ip->halfword[1];
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insn.halfword[1] = ip->halfword[0];
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} else {
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insn.word = ip->word;
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}
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if (is_jump_ins(&insn))
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break;
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if (!info->frame_size) {
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if (is_sp_move_ins(&insn))
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{
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#ifdef CONFIG_CPU_MICROMIPS
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if (mm_insn_16bit(ip->halfword[0]))
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{
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unsigned short tmp;
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if (ip->halfword[0] & mm_addiusp_func)
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{
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tmp = (((ip->halfword[0] >> 1) & 0x1ff) << 2);
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info->frame_size = -(signed short)(tmp | ((tmp & 0x100) ? 0xfe00 : 0));
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} else {
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tmp = (ip->halfword[0] >> 1);
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info->frame_size = -(signed short)(tmp & 0xf);
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}
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ip = (void *) &ip->halfword[1];
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ip--;
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} else
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#endif
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info->frame_size = - ip->i_format.simmediate;
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}
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continue;
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}
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if (info->pc_offset == -1 &&
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is_ra_save_ins(&insn, &info->pc_offset))
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break;
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}
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if (info->frame_size && info->pc_offset >= 0) /* nested */
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return 0;
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if (info->pc_offset < 0) /* leaf */
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return 1;
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/* prologue seems bogus... */
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err:
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return -1;
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}
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static struct mips_frame_info schedule_mfi __read_mostly;
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#ifdef CONFIG_KALLSYMS
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static unsigned long get___schedule_addr(void)
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{
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return kallsyms_lookup_name("__schedule");
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}
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#else
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static unsigned long get___schedule_addr(void)
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{
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union mips_instruction *ip = (void *)schedule;
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int max_insns = 8;
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int i;
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for (i = 0; i < max_insns; i++, ip++) {
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if (ip->j_format.opcode == j_op)
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return J_TARGET(ip, ip->j_format.target);
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}
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return 0;
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}
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#endif
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static int __init frame_info_init(void)
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{
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unsigned long size = 0;
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#ifdef CONFIG_KALLSYMS
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unsigned long ofs;
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#endif
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unsigned long addr;
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addr = get___schedule_addr();
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if (!addr)
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addr = (unsigned long)schedule;
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#ifdef CONFIG_KALLSYMS
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kallsyms_lookup_size_offset(addr, &size, &ofs);
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#endif
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schedule_mfi.func = (void *)addr;
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schedule_mfi.func_size = size;
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get_frame_info(&schedule_mfi);
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/*
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* Without schedule() frame info, result given by
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* thread_saved_pc() and get_wchan() are not reliable.
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*/
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if (schedule_mfi.pc_offset < 0)
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printk("Can't analyze schedule() prologue at %p\n", schedule);
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return 0;
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}
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arch_initcall(frame_info_init);
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/*
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* Return saved PC of a blocked thread.
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*/
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unsigned long thread_saved_pc(struct task_struct *tsk)
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{
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struct thread_struct *t = &tsk->thread;
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/* New born processes are a special case */
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if (t->reg31 == (unsigned long) ret_from_fork)
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return t->reg31;
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if (schedule_mfi.pc_offset < 0)
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return 0;
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return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset];
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}
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#ifdef CONFIG_KALLSYMS
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/* generic stack unwinding function */
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unsigned long notrace unwind_stack_by_address(unsigned long stack_page,
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unsigned long *sp,
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unsigned long pc,
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unsigned long *ra)
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{
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unsigned long low, high, irq_stack_high;
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struct mips_frame_info info;
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unsigned long size, ofs;
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struct pt_regs *regs;
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int leaf;
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if (!stack_page)
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return 0;
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/*
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* IRQ stacks start at IRQ_STACK_START
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* task stacks at THREAD_SIZE - 32
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*/
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low = stack_page;
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if (!preemptible() && on_irq_stack(raw_smp_processor_id(), *sp)) {
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high = stack_page + IRQ_STACK_START;
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irq_stack_high = high;
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} else {
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high = stack_page + THREAD_SIZE - 32;
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irq_stack_high = 0;
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}
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/*
|
|
* If we reached the top of the interrupt stack, start unwinding
|
|
* the interrupted task stack.
|
|
*/
|
|
if (unlikely(*sp == irq_stack_high)) {
|
|
unsigned long task_sp = *(unsigned long *)*sp;
|
|
|
|
/*
|
|
* Check that the pointer saved in the IRQ stack head points to
|
|
* something within the stack of the current task
|
|
*/
|
|
if (!object_is_on_stack((void *)task_sp))
|
|
return 0;
|
|
|
|
/*
|
|
* Follow pointer to tasks kernel stack frame where interrupted
|
|
* state was saved.
|
|
*/
|
|
regs = (struct pt_regs *)task_sp;
|
|
pc = regs->cp0_epc;
|
|
if (!user_mode(regs) && __kernel_text_address(pc)) {
|
|
*sp = regs->regs[29];
|
|
*ra = regs->regs[31];
|
|
return pc;
|
|
}
|
|
return 0;
|
|
}
|
|
if (!kallsyms_lookup_size_offset(pc, &size, &ofs))
|
|
return 0;
|
|
/*
|
|
* Return ra if an exception occurred at the first instruction
|
|
*/
|
|
if (unlikely(ofs == 0)) {
|
|
pc = *ra;
|
|
*ra = 0;
|
|
return pc;
|
|
}
|
|
|
|
info.func = (void *)(pc - ofs);
|
|
info.func_size = ofs; /* analyze from start to ofs */
|
|
leaf = get_frame_info(&info);
|
|
if (leaf < 0)
|
|
return 0;
|
|
|
|
if (*sp < low || *sp + info.frame_size > high)
|
|
return 0;
|
|
|
|
if (leaf)
|
|
/*
|
|
* For some extreme cases, get_frame_info() can
|
|
* consider wrongly a nested function as a leaf
|
|
* one. In that cases avoid to return always the
|
|
* same value.
|
|
*/
|
|
pc = pc != *ra ? *ra : 0;
|
|
else
|
|
pc = ((unsigned long *)(*sp))[info.pc_offset];
|
|
|
|
*sp += info.frame_size;
|
|
*ra = 0;
|
|
return __kernel_text_address(pc) ? pc : 0;
|
|
}
|
|
EXPORT_SYMBOL(unwind_stack_by_address);
|
|
|
|
/* used by show_backtrace() */
|
|
unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
|
|
unsigned long pc, unsigned long *ra)
|
|
{
|
|
unsigned long stack_page = 0;
|
|
int cpu;
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
if (on_irq_stack(cpu, *sp)) {
|
|
stack_page = (unsigned long)irq_stack[cpu];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!stack_page)
|
|
stack_page = (unsigned long)task_stack_page(task);
|
|
|
|
return unwind_stack_by_address(stack_page, sp, pc, ra);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* get_wchan - a maintenance nightmare^W^Wpain in the ass ...
|
|
*/
|
|
unsigned long get_wchan(struct task_struct *task)
|
|
{
|
|
unsigned long pc = 0;
|
|
#ifdef CONFIG_KALLSYMS
|
|
unsigned long sp;
|
|
unsigned long ra = 0;
|
|
#endif
|
|
|
|
if (!task || task == current || task->state == TASK_RUNNING)
|
|
goto out;
|
|
if (!task_stack_page(task))
|
|
goto out;
|
|
|
|
pc = thread_saved_pc(task);
|
|
|
|
#ifdef CONFIG_KALLSYMS
|
|
sp = task->thread.reg29 + schedule_mfi.frame_size;
|
|
|
|
while (in_sched_functions(pc))
|
|
pc = unwind_stack(task, &sp, pc, &ra);
|
|
#endif
|
|
|
|
out:
|
|
return pc;
|
|
}
|
|
|
|
/*
|
|
* Don't forget that the stack pointer must be aligned on a 8 bytes
|
|
* boundary for 32-bits ABI and 16 bytes for 64-bits ABI.
|
|
*/
|
|
unsigned long arch_align_stack(unsigned long sp)
|
|
{
|
|
if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
|
|
sp -= get_random_int() & ~PAGE_MASK;
|
|
|
|
return sp & ALMASK;
|
|
}
|
|
|
|
static void arch_dump_stack(void *info)
|
|
{
|
|
struct pt_regs *regs;
|
|
|
|
regs = get_irq_regs();
|
|
|
|
if (regs)
|
|
show_regs(regs);
|
|
|
|
dump_stack();
|
|
}
|
|
|
|
void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
|
|
{
|
|
long this_cpu = get_cpu();
|
|
|
|
if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
|
|
dump_stack();
|
|
|
|
smp_call_function_many(mask, arch_dump_stack, NULL, 1);
|
|
|
|
put_cpu();
|
|
}
|
|
|
|
int mips_get_process_fp_mode(struct task_struct *task)
|
|
{
|
|
int value = 0;
|
|
|
|
if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
|
|
value |= PR_FP_MODE_FR;
|
|
if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
|
|
value |= PR_FP_MODE_FRE;
|
|
|
|
return value;
|
|
}
|
|
|
|
static void prepare_for_fp_mode_switch(void *info)
|
|
{
|
|
struct mm_struct *mm = info;
|
|
|
|
if (current->mm == mm)
|
|
lose_fpu(1);
|
|
}
|
|
|
|
int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
|
|
{
|
|
const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
|
|
struct task_struct *t;
|
|
int max_users;
|
|
|
|
/* Check the value is valid */
|
|
if (value & ~known_bits)
|
|
return -EOPNOTSUPP;
|
|
|
|
/* Avoid inadvertently triggering emulation */
|
|
if ((value & PR_FP_MODE_FR) && raw_cpu_has_fpu &&
|
|
!(raw_current_cpu_data.fpu_id & MIPS_FPIR_F64))
|
|
return -EOPNOTSUPP;
|
|
if ((value & PR_FP_MODE_FRE) && raw_cpu_has_fpu && !cpu_has_fre)
|
|
return -EOPNOTSUPP;
|
|
|
|
/* FR = 0 not supported in MIPS R6 */
|
|
if (!(value & PR_FP_MODE_FR) && raw_cpu_has_fpu && cpu_has_mips_r6)
|
|
return -EOPNOTSUPP;
|
|
|
|
/* Proceed with the mode switch */
|
|
preempt_disable();
|
|
|
|
/* Save FP & vector context, then disable FPU & MSA */
|
|
if (task->signal == current->signal)
|
|
lose_fpu(1);
|
|
|
|
/* Prevent any threads from obtaining live FP context */
|
|
atomic_set(&task->mm->context.fp_mode_switching, 1);
|
|
smp_mb__after_atomic();
|
|
|
|
/*
|
|
* If there are multiple online CPUs then force any which are running
|
|
* threads in this process to lose their FPU context, which they can't
|
|
* regain until fp_mode_switching is cleared later.
|
|
*/
|
|
if (num_online_cpus() > 1) {
|
|
/* No need to send an IPI for the local CPU */
|
|
max_users = (task->mm == current->mm) ? 1 : 0;
|
|
|
|
if (atomic_read(¤t->mm->mm_users) > max_users)
|
|
smp_call_function(prepare_for_fp_mode_switch,
|
|
(void *)current->mm, 1);
|
|
}
|
|
|
|
/*
|
|
* There are now no threads of the process with live FP context, so it
|
|
* is safe to proceed with the FP mode switch.
|
|
*/
|
|
for_each_thread(task, t) {
|
|
/* Update desired FP register width */
|
|
if (value & PR_FP_MODE_FR) {
|
|
clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
|
|
} else {
|
|
set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
|
|
clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
|
|
}
|
|
|
|
/* Update desired FP single layout */
|
|
if (value & PR_FP_MODE_FRE)
|
|
set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
|
|
else
|
|
clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
|
|
}
|
|
|
|
/* Allow threads to use FP again */
|
|
atomic_set(&task->mm->context.fp_mode_switching, 0);
|
|
preempt_enable();
|
|
|
|
return 0;
|
|
}
|
|
|
|
#if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
|
|
void mips_dump_regs32(u32 *uregs, const struct pt_regs *regs)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
|
|
/* k0/k1 are copied as zero. */
|
|
if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
|
|
uregs[i] = 0;
|
|
else
|
|
uregs[i] = regs->regs[i - MIPS32_EF_R0];
|
|
}
|
|
|
|
uregs[MIPS32_EF_LO] = regs->lo;
|
|
uregs[MIPS32_EF_HI] = regs->hi;
|
|
uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
|
|
uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
|
|
uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
|
|
uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
|
|
}
|
|
#endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
|
|
|
|
#ifdef CONFIG_64BIT
|
|
void mips_dump_regs64(u64 *uregs, const struct pt_regs *regs)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
|
|
/* k0/k1 are copied as zero. */
|
|
if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
|
|
uregs[i] = 0;
|
|
else
|
|
uregs[i] = regs->regs[i - MIPS64_EF_R0];
|
|
}
|
|
|
|
uregs[MIPS64_EF_LO] = regs->lo;
|
|
uregs[MIPS64_EF_HI] = regs->hi;
|
|
uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
|
|
uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
|
|
uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
|
|
uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
|
|
}
|
|
#endif /* CONFIG_64BIT */
|