134 lines
4.1 KiB
C
134 lines
4.1 KiB
C
#ifndef __ASMARM_ELF_H
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#define __ASMARM_ELF_H
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#include <linux/config.h>
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/*
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* ELF register definitions..
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*/
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#include <asm/ptrace.h>
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#include <asm/user.h>
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#include <asm/procinfo.h>
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typedef unsigned long elf_greg_t;
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typedef unsigned long elf_freg_t[3];
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#define EM_ARM 40
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#define EF_ARM_APCS26 0x08
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#define EF_ARM_SOFT_FLOAT 0x200
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#define EF_ARM_EABI_MASK 0xFF000000
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#define R_ARM_NONE 0
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#define R_ARM_PC24 1
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#define R_ARM_ABS32 2
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#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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typedef struct user_fp elf_fpregset_t;
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ( ((x)->e_machine == EM_ARM) && (ELF_PROC_OK((x))) )
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_CLASS ELFCLASS32
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#ifdef __ARMEB__
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#define ELF_DATA ELFDATA2MSB
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#else
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#define ELF_DATA ELFDATA2LSB
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#endif
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#define ELF_ARCH EM_ARM
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE 4096
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
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/* When the program starts, a1 contains a pointer to a function to be
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registered with atexit, as per the SVR4 ABI. A value of 0 means we
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have no such handler. */
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#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0
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/* This yields a mask that user programs can use to figure out what
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instruction set this cpu supports. */
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#define ELF_HWCAP (elf_hwcap)
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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intent than poking at uname or /proc/cpuinfo. */
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/* For now we just provide a fairly general string that describes the
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processor family. This could be made more specific later if someone
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implemented optimisations that require it. 26-bit CPUs give you
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"v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't
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supported). 32-bit CPUs give you "v3[lb]" for anything based on an
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ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1
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core. */
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#define ELF_PLATFORM_SIZE 8
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extern char elf_platform[];
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#define ELF_PLATFORM (elf_platform)
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#ifdef __KERNEL__
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/*
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* 32-bit code is always OK. Some cpus can do 26-bit, some can't.
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*/
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#define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x))
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#define ELF_THUMB_OK(x) \
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(( (elf_hwcap & HWCAP_THUMB) && ((x)->e_entry & 1) == 1) || \
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((x)->e_entry & 3) == 0)
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#define ELF_26BIT_OK(x) \
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(( (elf_hwcap & HWCAP_26BIT) && (x)->e_flags & EF_ARM_APCS26) || \
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((x)->e_flags & EF_ARM_APCS26) == 0)
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#ifndef CONFIG_IWMMXT
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/* Old NetWinder binaries were compiled in such a way that the iBCS
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heuristic always trips on them. Until these binaries become uncommon
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enough not to care, don't trust the `ibcs' flag here. In any case
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there is no other ELF system currently supported by iBCS.
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@@ Could print a warning message to encourage users to upgrade. */
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#define SET_PERSONALITY(ex,ibcs2) \
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set_personality(((ex).e_flags&EF_ARM_APCS26 ?PER_LINUX :PER_LINUX_32BIT))
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#else
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/*
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* All iWMMXt capable CPUs don't support 26-bit mode. Yet they can run
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* legacy binaries which used to contain FPA11 floating point instructions
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* that have always been emulated by the kernel. PFA11 and iWMMXt overlap
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* on coprocessor 1 space though. We therefore must decide if given task
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* is allowed to use CP 0 and 1 for iWMMXt, or if they should be blocked
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* at all times for the prefetch exception handler to catch FPA11 opcodes
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* and emulate them. The best indication to discriminate those two cases
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* is the SOFT_FLOAT flag in the ELF header.
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*/
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#define SET_PERSONALITY(ex,ibcs2) \
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do { \
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set_personality(PER_LINUX_32BIT); \
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if (((ex).e_flags & EF_ARM_EABI_MASK) || \
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((ex).e_flags & EF_ARM_SOFT_FLOAT)) \
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set_thread_flag(TIF_USING_IWMMXT); \
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} while (0)
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#endif
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#endif
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#endif
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