263 lines
6.9 KiB
C
263 lines
6.9 KiB
C
/*
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* Copyright (C) 2009 ST-Ericsson
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*
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* AB4500 device core funtions, for client access
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*/
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#ifndef MFD_AB4500_H
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#define MFD_AB4500_H
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#include <linux/device.h>
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/*
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* AB4500 bank addresses
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*/
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#define AB4500_SYS_CTRL1_BLOCK 0x1
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#define AB4500_SYS_CTRL2_BLOCK 0x2
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#define AB4500_REGU_CTRL1 0x3
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#define AB4500_REGU_CTRL2 0x4
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#define AB4500_USB 0x5
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#define AB4500_TVOUT 0x6
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#define AB4500_DBI 0x7
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#define AB4500_ECI_AV_ACC 0x8
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#define AB4500_RESERVED 0x9
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#define AB4500_GPADC 0xA
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#define AB4500_CHARGER 0xB
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#define AB4500_GAS_GAUGE 0xC
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#define AB4500_AUDIO 0xD
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#define AB4500_INTERRUPT 0xE
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#define AB4500_RTC 0xF
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#define AB4500_MISC 0x10
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#define AB4500_DEBUG 0x12
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#define AB4500_PROD_TEST 0x13
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#define AB4500_OTP_EMUL 0x15
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/*
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* System control 1 register offsets.
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* Bank = 0x01
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*/
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#define AB4500_TURNON_STAT_REG 0x0100
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#define AB4500_RESET_STAT_REG 0x0101
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#define AB4500_PONKEY1_PRESS_STAT_REG 0x0102
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#define AB4500_FSM_STAT1_REG 0x0140
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#define AB4500_FSM_STAT2_REG 0x0141
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#define AB4500_SYSCLK_REQ_STAT_REG 0x0142
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#define AB4500_USB_STAT1_REG 0x0143
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#define AB4500_USB_STAT2_REG 0x0144
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#define AB4500_STATUS_SPARE1_REG 0x0145
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#define AB4500_STATUS_SPARE2_REG 0x0146
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#define AB4500_CTRL1_REG 0x0180
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#define AB4500_CTRL2_REG 0x0181
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/*
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* System control 2 register offsets.
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* bank = 0x02
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*/
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#define AB4500_CTRL3_REG 0x0200
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#define AB4500_MAIN_WDOG_CTRL_REG 0x0201
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#define AB4500_MAIN_WDOG_TIMER_REG 0x0202
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#define AB4500_LOW_BAT_REG 0x0203
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#define AB4500_BATT_OK_REG 0x0204
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#define AB4500_SYSCLK_TIMER_REG 0x0205
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#define AB4500_SMPSCLK_CTRL_REG 0x0206
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#define AB4500_SMPSCLK_SEL1_REG 0x0207
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#define AB4500_SMPSCLK_SEL2_REG 0x0208
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#define AB4500_SMPSCLK_SEL3_REG 0x0209
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#define AB4500_SYSULPCLK_CONF_REG 0x020A
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#define AB4500_SYSULPCLK_CTRL1_REG 0x020B
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#define AB4500_SYSCLK_CTRL_REG 0x020C
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#define AB4500_SYSCLK_REQ1_VALID_REG 0x020D
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#define AB4500_SYSCLK_REQ_VALID_REG 0x020E
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#define AB4500_SYSCTRL_SPARE_REG 0x020F
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#define AB4500_PAD_CONF_REG 0x0210
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/*
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* Regu control1 register offsets
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* Bank = 0x03
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*/
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#define AB4500_REGU_SERIAL_CTRL1_REG 0x0300
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#define AB4500_REGU_SERIAL_CTRL2_REG 0x0301
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#define AB4500_REGU_SERIAL_CTRL3_REG 0x0302
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#define AB4500_REGU_REQ_CTRL1_REG 0x0303
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#define AB4500_REGU_REQ_CTRL2_REG 0x0304
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#define AB4500_REGU_REQ_CTRL3_REG 0x0305
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#define AB4500_REGU_REQ_CTRL4_REG 0x0306
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#define AB4500_REGU_MISC1_REG 0x0380
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#define AB4500_REGU_OTGSUPPLY_CTRL_REG 0x0381
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#define AB4500_REGU_VUSB_CTRL_REG 0x0382
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#define AB4500_REGU_VAUDIO_SUPPLY_REG 0x0383
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#define AB4500_REGU_CTRL1_SPARE_REG 0x0384
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/*
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* Regu control2 Vmod register offsets
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*/
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#define AB4500_REGU_VMOD_REGU_REG 0x0440
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#define AB4500_REGU_VMOD_SEL1_REG 0x0441
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#define AB4500_REGU_VMOD_SEL2_REG 0x0442
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#define AB4500_REGU_CTRL_DISCH_REG 0x0443
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#define AB4500_REGU_CTRL_DISCH2_REG 0x0444
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/*
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* USB/ULPI register offsets
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* Bank : 0x5
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*/
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#define AB4500_USB_LINE_STAT_REG 0x0580
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#define AB4500_USB_LINE_CTRL1_REG 0x0581
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#define AB4500_USB_LINE_CTRL2_REG 0x0582
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#define AB4500_USB_LINE_CTRL3_REG 0x0583
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#define AB4500_USB_LINE_CTRL4_REG 0x0584
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#define AB4500_USB_LINE_CTRL5_REG 0x0585
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#define AB4500_USB_OTG_CTRL_REG 0x0587
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#define AB4500_USB_OTG_STAT_REG 0x0588
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#define AB4500_USB_OTG_STAT_REG 0x0588
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#define AB4500_USB_CTRL_SPARE_REG 0x0589
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#define AB4500_USB_PHY_CTRL_REG 0x058A
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/*
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* TVOUT / CTRL register offsets
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* Bank : 0x06
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*/
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#define AB4500_TVOUT_CTRL_REG 0x0680
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/*
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* DBI register offsets
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* Bank : 0x07
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*/
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#define AB4500_DBI_REG1_REG 0x0700
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#define AB4500_DBI_REG2_REG 0x0701
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/*
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* ECI regsiter offsets
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* Bank : 0x08
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*/
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#define AB4500_ECI_CTRL_REG 0x0800
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#define AB4500_ECI_HOOKLEVEL_REG 0x0801
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#define AB4500_ECI_DATAOUT_REG 0x0802
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#define AB4500_ECI_DATAIN_REG 0x0803
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/*
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* AV Connector register offsets
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* Bank : 0x08
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*/
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#define AB4500_AV_CONN_REG 0x0840
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/*
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* Accessory detection register offsets
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* Bank : 0x08
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*/
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#define AB4500_ACC_DET_DB1_REG 0x0880
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#define AB4500_ACC_DET_DB2_REG 0x0881
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/*
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* GPADC register offsets
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* Bank : 0x0A
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*/
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#define AB4500_GPADC_CTRL1_REG 0x0A00
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#define AB4500_GPADC_CTRL2_REG 0x0A01
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#define AB4500_GPADC_CTRL3_REG 0x0A02
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#define AB4500_GPADC_AUTO_TIMER_REG 0x0A03
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#define AB4500_GPADC_STAT_REG 0x0A04
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#define AB4500_GPADC_MANDATAL_REG 0x0A05
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#define AB4500_GPADC_MANDATAH_REG 0x0A06
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#define AB4500_GPADC_AUTODATAL_REG 0x0A07
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#define AB4500_GPADC_AUTODATAH_REG 0x0A08
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#define AB4500_GPADC_MUX_CTRL_REG 0x0A09
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/*
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* Charger / status register offfsets
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* Bank : 0x0B
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*/
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#define AB4500_CH_STATUS1_REG 0x0B00
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#define AB4500_CH_STATUS2_REG 0x0B01
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#define AB4500_CH_USBCH_STAT1_REG 0x0B02
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#define AB4500_CH_USBCH_STAT2_REG 0x0B03
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#define AB4500_CH_FSM_STAT_REG 0x0B04
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#define AB4500_CH_STAT_REG 0x0B05
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/*
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* Charger / control register offfsets
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* Bank : 0x0B
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*/
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#define AB4500_CH_VOLT_LVL_REG 0x0B40
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/*
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* Charger / main control register offfsets
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* Bank : 0x0B
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*/
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#define AB4500_MCH_CTRL1 0x0B80
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#define AB4500_MCH_CTRL2 0x0B81
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#define AB4500_MCH_IPT_CURLVL_REG 0x0B82
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#define AB4500_CH_WD_REG 0x0B83
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/*
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* Charger / USB control register offsets
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* Bank : 0x0B
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*/
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#define AB4500_USBCH_CTRL1_REG 0x0BC0
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#define AB4500_USBCH_CTRL2_REG 0x0BC1
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#define AB4500_USBCH_IPT_CRNTLVL_REG 0x0BC2
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/*
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* RTC bank register offsets
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* Bank : 0xF
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*/
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#define AB4500_RTC_SOFF_STAT_REG 0x0F00
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#define AB4500_RTC_CC_CONF_REG 0x0F01
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#define AB4500_RTC_READ_REQ_REG 0x0F02
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#define AB4500_RTC_WATCH_TSECMID_REG 0x0F03
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#define AB4500_RTC_WATCH_TSECHI_REG 0x0F04
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#define AB4500_RTC_WATCH_TMIN_LOW_REG 0x0F05
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#define AB4500_RTC_WATCH_TMIN_MID_REG 0x0F06
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#define AB4500_RTC_WATCH_TMIN_HI_REG 0x0F07
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#define AB4500_RTC_ALRM_MIN_LOW_REG 0x0F08
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#define AB4500_RTC_ALRM_MIN_MID_REG 0x0F09
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#define AB4500_RTC_ALRM_MIN_HI_REG 0x0F0A
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#define AB4500_RTC_STAT_REG 0x0F0B
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#define AB4500_RTC_BKUP_CHG_REG 0x0F0C
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#define AB4500_RTC_FORCE_BKUP_REG 0x0F0D
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#define AB4500_RTC_CALIB_REG 0x0F0E
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#define AB4500_RTC_SWITCH_STAT_REG 0x0F0F
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/*
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* PWM Out generators
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* Bank: 0x10
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*/
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#define AB4500_PWM_OUT_CTRL1_REG 0x1060
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#define AB4500_PWM_OUT_CTRL2_REG 0x1061
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#define AB4500_PWM_OUT_CTRL3_REG 0x1062
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#define AB4500_PWM_OUT_CTRL4_REG 0x1063
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#define AB4500_PWM_OUT_CTRL5_REG 0x1064
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#define AB4500_PWM_OUT_CTRL6_REG 0x1065
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#define AB4500_PWM_OUT_CTRL7_REG 0x1066
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#define AB4500_I2C_PAD_CTRL_REG 0x1067
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#define AB4500_REV_REG 0x1080
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/**
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* struct ab4500
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* @spi: spi device structure
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* @tx_buf: transmit buffer
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* @rx_buf: receive buffer
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* @lock: sync primitive
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*/
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struct ab4500 {
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struct spi_device *spi;
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unsigned long tx_buf[4];
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unsigned long rx_buf[4];
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struct mutex lock;
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};
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int ab4500_write(struct ab4500 *ab4500, unsigned char block,
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unsigned long addr, unsigned char data);
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int ab4500_read(struct ab4500 *ab4500, unsigned char block,
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unsigned long addr);
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#endif /* MFD_AB4500_H */
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