625 lines
17 KiB
C
625 lines
17 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Register definitions for Rockchip's RK808/RK818 PMIC
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*
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* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Chris Zhong <zyw@rock-chips.com>
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* Author: Zhang Qing <zhangqing@rock-chips.com>
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*
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* Copyright (C) 2016 PHYTEC Messtechnik GmbH
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*
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* Author: Wadim Egorov <w.egorov@phytec.de>
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*/
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#ifndef __LINUX_REGULATOR_RK808_H
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#define __LINUX_REGULATOR_RK808_H
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#include <linux/regulator/machine.h>
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#include <linux/regmap.h>
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/*
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* rk808 Global Register Map.
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*/
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#define RK808_DCDC1 0 /* (0+RK808_START) */
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#define RK808_LDO1 4 /* (4+RK808_START) */
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#define RK808_NUM_REGULATORS 14
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enum rk808_reg {
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RK808_ID_DCDC1,
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RK808_ID_DCDC2,
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RK808_ID_DCDC3,
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RK808_ID_DCDC4,
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RK808_ID_LDO1,
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RK808_ID_LDO2,
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RK808_ID_LDO3,
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RK808_ID_LDO4,
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RK808_ID_LDO5,
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RK808_ID_LDO6,
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RK808_ID_LDO7,
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RK808_ID_LDO8,
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RK808_ID_SWITCH1,
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RK808_ID_SWITCH2,
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};
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#define RK808_SECONDS_REG 0x00
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#define RK808_MINUTES_REG 0x01
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#define RK808_HOURS_REG 0x02
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#define RK808_DAYS_REG 0x03
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#define RK808_MONTHS_REG 0x04
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#define RK808_YEARS_REG 0x05
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#define RK808_WEEKS_REG 0x06
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#define RK808_ALARM_SECONDS_REG 0x08
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#define RK808_ALARM_MINUTES_REG 0x09
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#define RK808_ALARM_HOURS_REG 0x0a
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#define RK808_ALARM_DAYS_REG 0x0b
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#define RK808_ALARM_MONTHS_REG 0x0c
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#define RK808_ALARM_YEARS_REG 0x0d
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#define RK808_RTC_CTRL_REG 0x10
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#define RK808_RTC_STATUS_REG 0x11
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#define RK808_RTC_INT_REG 0x12
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#define RK808_RTC_COMP_LSB_REG 0x13
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#define RK808_RTC_COMP_MSB_REG 0x14
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#define RK808_ID_MSB 0x17
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#define RK808_ID_LSB 0x18
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#define RK808_CLK32OUT_REG 0x20
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#define RK808_VB_MON_REG 0x21
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#define RK808_THERMAL_REG 0x22
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#define RK808_DCDC_EN_REG 0x23
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#define RK808_LDO_EN_REG 0x24
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#define RK808_SLEEP_SET_OFF_REG1 0x25
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#define RK808_SLEEP_SET_OFF_REG2 0x26
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#define RK808_DCDC_UV_STS_REG 0x27
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#define RK808_DCDC_UV_ACT_REG 0x28
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#define RK808_LDO_UV_STS_REG 0x29
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#define RK808_LDO_UV_ACT_REG 0x2a
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#define RK808_DCDC_PG_REG 0x2b
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#define RK808_LDO_PG_REG 0x2c
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#define RK808_VOUT_MON_TDB_REG 0x2d
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#define RK808_BUCK1_CONFIG_REG 0x2e
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#define RK808_BUCK1_ON_VSEL_REG 0x2f
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#define RK808_BUCK1_SLP_VSEL_REG 0x30
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#define RK808_BUCK1_DVS_VSEL_REG 0x31
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#define RK808_BUCK2_CONFIG_REG 0x32
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#define RK808_BUCK2_ON_VSEL_REG 0x33
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#define RK808_BUCK2_SLP_VSEL_REG 0x34
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#define RK808_BUCK2_DVS_VSEL_REG 0x35
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#define RK808_BUCK3_CONFIG_REG 0x36
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#define RK808_BUCK4_CONFIG_REG 0x37
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#define RK808_BUCK4_ON_VSEL_REG 0x38
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#define RK808_BUCK4_SLP_VSEL_REG 0x39
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#define RK808_BOOST_CONFIG_REG 0x3a
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#define RK808_LDO1_ON_VSEL_REG 0x3b
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#define RK808_LDO1_SLP_VSEL_REG 0x3c
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#define RK808_LDO2_ON_VSEL_REG 0x3d
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#define RK808_LDO2_SLP_VSEL_REG 0x3e
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#define RK808_LDO3_ON_VSEL_REG 0x3f
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#define RK808_LDO3_SLP_VSEL_REG 0x40
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#define RK808_LDO4_ON_VSEL_REG 0x41
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#define RK808_LDO4_SLP_VSEL_REG 0x42
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#define RK808_LDO5_ON_VSEL_REG 0x43
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#define RK808_LDO5_SLP_VSEL_REG 0x44
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#define RK808_LDO6_ON_VSEL_REG 0x45
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#define RK808_LDO6_SLP_VSEL_REG 0x46
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#define RK808_LDO7_ON_VSEL_REG 0x47
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#define RK808_LDO7_SLP_VSEL_REG 0x48
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#define RK808_LDO8_ON_VSEL_REG 0x49
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#define RK808_LDO8_SLP_VSEL_REG 0x4a
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#define RK808_DEVCTRL_REG 0x4b
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#define RK808_INT_STS_REG1 0x4c
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#define RK808_INT_STS_MSK_REG1 0x4d
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#define RK808_INT_STS_REG2 0x4e
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#define RK808_INT_STS_MSK_REG2 0x4f
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#define RK808_IO_POL_REG 0x50
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/* RK818 */
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#define RK818_DCDC1 0
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#define RK818_LDO1 4
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#define RK818_NUM_REGULATORS 17
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enum rk818_reg {
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RK818_ID_DCDC1,
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RK818_ID_DCDC2,
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RK818_ID_DCDC3,
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RK818_ID_DCDC4,
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RK818_ID_BOOST,
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RK818_ID_LDO1,
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RK818_ID_LDO2,
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RK818_ID_LDO3,
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RK818_ID_LDO4,
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RK818_ID_LDO5,
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RK818_ID_LDO6,
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RK818_ID_LDO7,
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RK818_ID_LDO8,
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RK818_ID_LDO9,
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RK818_ID_SWITCH,
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RK818_ID_HDMI_SWITCH,
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RK818_ID_OTG_SWITCH,
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};
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#define RK818_DCDC_EN_REG 0x23
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#define RK818_LDO_EN_REG 0x24
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#define RK818_SLEEP_SET_OFF_REG1 0x25
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#define RK818_SLEEP_SET_OFF_REG2 0x26
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#define RK818_DCDC_UV_STS_REG 0x27
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#define RK818_DCDC_UV_ACT_REG 0x28
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#define RK818_LDO_UV_STS_REG 0x29
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#define RK818_LDO_UV_ACT_REG 0x2a
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#define RK818_DCDC_PG_REG 0x2b
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#define RK818_LDO_PG_REG 0x2c
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#define RK818_VOUT_MON_TDB_REG 0x2d
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#define RK818_BUCK1_CONFIG_REG 0x2e
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#define RK818_BUCK1_ON_VSEL_REG 0x2f
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#define RK818_BUCK1_SLP_VSEL_REG 0x30
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#define RK818_BUCK2_CONFIG_REG 0x32
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#define RK818_BUCK2_ON_VSEL_REG 0x33
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#define RK818_BUCK2_SLP_VSEL_REG 0x34
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#define RK818_BUCK3_CONFIG_REG 0x36
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#define RK818_BUCK4_CONFIG_REG 0x37
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#define RK818_BUCK4_ON_VSEL_REG 0x38
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#define RK818_BUCK4_SLP_VSEL_REG 0x39
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#define RK818_BOOST_CONFIG_REG 0x3a
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#define RK818_LDO1_ON_VSEL_REG 0x3b
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#define RK818_LDO1_SLP_VSEL_REG 0x3c
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#define RK818_LDO2_ON_VSEL_REG 0x3d
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#define RK818_LDO2_SLP_VSEL_REG 0x3e
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#define RK818_LDO3_ON_VSEL_REG 0x3f
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#define RK818_LDO3_SLP_VSEL_REG 0x40
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#define RK818_LDO4_ON_VSEL_REG 0x41
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#define RK818_LDO4_SLP_VSEL_REG 0x42
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#define RK818_LDO5_ON_VSEL_REG 0x43
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#define RK818_LDO5_SLP_VSEL_REG 0x44
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#define RK818_LDO6_ON_VSEL_REG 0x45
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#define RK818_LDO6_SLP_VSEL_REG 0x46
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#define RK818_LDO7_ON_VSEL_REG 0x47
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#define RK818_LDO7_SLP_VSEL_REG 0x48
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#define RK818_LDO8_ON_VSEL_REG 0x49
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#define RK818_LDO8_SLP_VSEL_REG 0x4a
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#define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
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#define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
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#define RK818_DEVCTRL_REG 0x4b
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#define RK818_INT_STS_REG1 0X4c
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#define RK818_INT_STS_MSK_REG1 0x4d
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#define RK818_INT_STS_REG2 0x4e
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#define RK818_INT_STS_MSK_REG2 0x4f
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#define RK818_IO_POL_REG 0x50
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#define RK818_H5V_EN_REG 0x52
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#define RK818_SLEEP_SET_OFF_REG3 0x53
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#define RK818_BOOST_LDO9_ON_VSEL_REG 0x54
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#define RK818_BOOST_LDO9_SLP_VSEL_REG 0x55
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#define RK818_BOOST_CTRL_REG 0x56
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#define RK818_DCDC_ILMAX 0x90
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#define RK818_USB_CTRL_REG 0xa1
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#define RK818_H5V_EN BIT(0)
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#define RK818_REF_RDY_CTRL BIT(1)
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#define RK818_USB_ILIM_SEL_MASK 0xf
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#define RK818_USB_ILMIN_2000MA 0x7
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#define RK818_USB_CHG_SD_VSEL_MASK 0x70
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/* RK805 */
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enum rk805_reg {
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RK805_ID_DCDC1,
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RK805_ID_DCDC2,
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RK805_ID_DCDC3,
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RK805_ID_DCDC4,
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RK805_ID_LDO1,
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RK805_ID_LDO2,
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RK805_ID_LDO3,
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};
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/* CONFIG REGISTER */
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#define RK805_VB_MON_REG 0x21
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#define RK805_THERMAL_REG 0x22
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/* POWER CHANNELS ENABLE REGISTER */
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#define RK805_DCDC_EN_REG 0x23
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#define RK805_SLP_DCDC_EN_REG 0x25
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#define RK805_SLP_LDO_EN_REG 0x26
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#define RK805_LDO_EN_REG 0x27
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/* BUCK AND LDO CONFIG REGISTER */
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#define RK805_BUCK_LDO_SLP_LP_EN_REG 0x2A
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#define RK805_BUCK1_CONFIG_REG 0x2E
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#define RK805_BUCK1_ON_VSEL_REG 0x2F
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#define RK805_BUCK1_SLP_VSEL_REG 0x30
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#define RK805_BUCK2_CONFIG_REG 0x32
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#define RK805_BUCK2_ON_VSEL_REG 0x33
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#define RK805_BUCK2_SLP_VSEL_REG 0x34
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#define RK805_BUCK3_CONFIG_REG 0x36
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#define RK805_BUCK4_CONFIG_REG 0x37
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#define RK805_BUCK4_ON_VSEL_REG 0x38
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#define RK805_BUCK4_SLP_VSEL_REG 0x39
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#define RK805_LDO1_ON_VSEL_REG 0x3B
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#define RK805_LDO1_SLP_VSEL_REG 0x3C
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#define RK805_LDO2_ON_VSEL_REG 0x3D
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#define RK805_LDO2_SLP_VSEL_REG 0x3E
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#define RK805_LDO3_ON_VSEL_REG 0x3F
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#define RK805_LDO3_SLP_VSEL_REG 0x40
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/* INTERRUPT REGISTER */
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#define RK805_PWRON_LP_INT_TIME_REG 0x47
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#define RK805_PWRON_DB_REG 0x48
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#define RK805_DEV_CTRL_REG 0x4B
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#define RK805_INT_STS_REG 0x4C
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#define RK805_INT_STS_MSK_REG 0x4D
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#define RK805_GPIO_IO_POL_REG 0x50
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#define RK805_OUT_REG 0x52
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#define RK805_ON_SOURCE_REG 0xAE
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#define RK805_OFF_SOURCE_REG 0xAF
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#define RK805_NUM_REGULATORS 7
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#define RK805_PWRON_FALL_RISE_INT_EN 0x0
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#define RK805_PWRON_FALL_RISE_INT_MSK 0x81
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/* RK805 IRQ Definitions */
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#define RK805_IRQ_PWRON_RISE 0
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#define RK805_IRQ_VB_LOW 1
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#define RK805_IRQ_PWRON 2
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#define RK805_IRQ_PWRON_LP 3
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#define RK805_IRQ_HOTDIE 4
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#define RK805_IRQ_RTC_ALARM 5
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#define RK805_IRQ_RTC_PERIOD 6
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#define RK805_IRQ_PWRON_FALL 7
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#define RK805_IRQ_PWRON_RISE_MSK BIT(0)
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#define RK805_IRQ_VB_LOW_MSK BIT(1)
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#define RK805_IRQ_PWRON_MSK BIT(2)
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#define RK805_IRQ_PWRON_LP_MSK BIT(3)
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#define RK805_IRQ_HOTDIE_MSK BIT(4)
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#define RK805_IRQ_RTC_ALARM_MSK BIT(5)
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#define RK805_IRQ_RTC_PERIOD_MSK BIT(6)
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#define RK805_IRQ_PWRON_FALL_MSK BIT(7)
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#define RK805_PWR_RISE_INT_STATUS BIT(0)
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#define RK805_VB_LOW_INT_STATUS BIT(1)
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#define RK805_PWRON_INT_STATUS BIT(2)
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#define RK805_PWRON_LP_INT_STATUS BIT(3)
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#define RK805_HOTDIE_INT_STATUS BIT(4)
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#define RK805_ALARM_INT_STATUS BIT(5)
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#define RK805_PERIOD_INT_STATUS BIT(6)
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#define RK805_PWR_FALL_INT_STATUS BIT(7)
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#define RK805_BUCK1_2_ILMAX_MASK (3 << 6)
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#define RK805_BUCK3_4_ILMAX_MASK (3 << 3)
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#define RK805_RTC_PERIOD_INT_MASK (1 << 6)
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#define RK805_RTC_ALARM_INT_MASK (1 << 5)
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#define RK805_INT_ALARM_EN (1 << 3)
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#define RK805_INT_TIMER_EN (1 << 2)
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/* RK808 IRQ Definitions */
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#define RK808_IRQ_VOUT_LO 0
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#define RK808_IRQ_VB_LO 1
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#define RK808_IRQ_PWRON 2
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#define RK808_IRQ_PWRON_LP 3
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#define RK808_IRQ_HOTDIE 4
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#define RK808_IRQ_RTC_ALARM 5
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#define RK808_IRQ_RTC_PERIOD 6
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#define RK808_IRQ_PLUG_IN_INT 7
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#define RK808_IRQ_PLUG_OUT_INT 8
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#define RK808_NUM_IRQ 9
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#define RK808_IRQ_VOUT_LO_MSK BIT(0)
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#define RK808_IRQ_VB_LO_MSK BIT(1)
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#define RK808_IRQ_PWRON_MSK BIT(2)
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#define RK808_IRQ_PWRON_LP_MSK BIT(3)
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#define RK808_IRQ_HOTDIE_MSK BIT(4)
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#define RK808_IRQ_RTC_ALARM_MSK BIT(5)
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#define RK808_IRQ_RTC_PERIOD_MSK BIT(6)
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#define RK808_IRQ_PLUG_IN_INT_MSK BIT(0)
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#define RK808_IRQ_PLUG_OUT_INT_MSK BIT(1)
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/* RK818 IRQ Definitions */
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#define RK818_IRQ_VOUT_LO 0
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#define RK818_IRQ_VB_LO 1
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#define RK818_IRQ_PWRON 2
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#define RK818_IRQ_PWRON_LP 3
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#define RK818_IRQ_HOTDIE 4
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#define RK818_IRQ_RTC_ALARM 5
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#define RK818_IRQ_RTC_PERIOD 6
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#define RK818_IRQ_USB_OV 7
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#define RK818_IRQ_PLUG_IN 8
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#define RK818_IRQ_PLUG_OUT 9
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#define RK818_IRQ_CHG_OK 10
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#define RK818_IRQ_CHG_TE 11
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#define RK818_IRQ_CHG_TS1 12
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#define RK818_IRQ_TS2 13
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#define RK818_IRQ_CHG_CVTLIM 14
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#define RK818_IRQ_DISCHG_ILIM 15
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#define RK818_IRQ_VOUT_LO_MSK BIT(0)
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#define RK818_IRQ_VB_LO_MSK BIT(1)
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#define RK818_IRQ_PWRON_MSK BIT(2)
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#define RK818_IRQ_PWRON_LP_MSK BIT(3)
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#define RK818_IRQ_HOTDIE_MSK BIT(4)
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#define RK818_IRQ_RTC_ALARM_MSK BIT(5)
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#define RK818_IRQ_RTC_PERIOD_MSK BIT(6)
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#define RK818_IRQ_USB_OV_MSK BIT(7)
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#define RK818_IRQ_PLUG_IN_MSK BIT(0)
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#define RK818_IRQ_PLUG_OUT_MSK BIT(1)
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#define RK818_IRQ_CHG_OK_MSK BIT(2)
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#define RK818_IRQ_CHG_TE_MSK BIT(3)
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#define RK818_IRQ_CHG_TS1_MSK BIT(4)
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#define RK818_IRQ_TS2_MSK BIT(5)
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#define RK818_IRQ_CHG_CVTLIM_MSK BIT(6)
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#define RK818_IRQ_DISCHG_ILIM_MSK BIT(7)
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#define RK818_NUM_IRQ 16
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#define RK808_VBAT_LOW_2V8 0x00
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#define RK808_VBAT_LOW_2V9 0x01
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#define RK808_VBAT_LOW_3V0 0x02
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#define RK808_VBAT_LOW_3V1 0x03
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#define RK808_VBAT_LOW_3V2 0x04
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#define RK808_VBAT_LOW_3V3 0x05
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#define RK808_VBAT_LOW_3V4 0x06
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#define RK808_VBAT_LOW_3V5 0x07
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#define VBAT_LOW_VOL_MASK (0x07 << 0)
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#define EN_VABT_LOW_SHUT_DOWN (0x00 << 4)
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#define EN_VBAT_LOW_IRQ (0x1 << 4)
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#define VBAT_LOW_ACT_MASK (0x1 << 4)
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#define BUCK_ILMIN_MASK (7 << 0)
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#define BOOST_ILMIN_MASK (7 << 0)
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#define BUCK1_RATE_MASK (3 << 3)
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#define BUCK2_RATE_MASK (3 << 3)
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#define MASK_ALL 0xff
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#define BUCK_UV_ACT_MASK 0x0f
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#define BUCK_UV_ACT_DISABLE 0
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#define SWITCH2_EN BIT(6)
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#define SWITCH1_EN BIT(5)
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#define DEV_OFF_RST BIT(3)
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#define DEV_OFF BIT(0)
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#define RTC_STOP BIT(0)
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#define VB_LO_ACT BIT(4)
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#define VB_LO_SEL_3500MV (7 << 0)
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#define VOUT_LO_INT BIT(0)
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#define CLK32KOUT2_EN BIT(0)
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#define TEMP115C 0x0c
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#define TEMP_HOTDIE_MSK 0x0c
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#define SLP_SD_MSK (0x3 << 2)
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#define SHUTDOWN_FUN (0x2 << 2)
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#define SLEEP_FUN (0x1 << 2)
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#define RK8XX_ID_MSK 0xfff0
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#define PWM_MODE_MSK BIT(7)
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#define FPWM_MODE BIT(7)
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#define AUTO_PWM_MODE 0
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enum rk817_reg_id {
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RK817_ID_DCDC1 = 0,
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RK817_ID_DCDC2,
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RK817_ID_DCDC3,
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RK817_ID_DCDC4,
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RK817_ID_LDO1,
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RK817_ID_LDO2,
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RK817_ID_LDO3,
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RK817_ID_LDO4,
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RK817_ID_LDO5,
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RK817_ID_LDO6,
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RK817_ID_LDO7,
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RK817_ID_LDO8,
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RK817_ID_LDO9,
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RK817_ID_BOOST,
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RK817_ID_BOOST_OTG_SW,
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RK817_NUM_REGULATORS
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};
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enum rk809_reg_id {
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RK809_ID_DCDC5 = RK817_ID_BOOST,
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RK809_ID_SW1,
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RK809_ID_SW2,
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RK809_NUM_REGULATORS
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};
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#define RK817_SECONDS_REG 0x00
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#define RK817_MINUTES_REG 0x01
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#define RK817_HOURS_REG 0x02
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#define RK817_DAYS_REG 0x03
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#define RK817_MONTHS_REG 0x04
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#define RK817_YEARS_REG 0x05
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#define RK817_WEEKS_REG 0x06
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#define RK817_ALARM_SECONDS_REG 0x07
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#define RK817_ALARM_MINUTES_REG 0x08
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#define RK817_ALARM_HOURS_REG 0x09
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#define RK817_ALARM_DAYS_REG 0x0a
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#define RK817_ALARM_MONTHS_REG 0x0b
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#define RK817_ALARM_YEARS_REG 0x0c
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#define RK817_RTC_CTRL_REG 0xd
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#define RK817_RTC_STATUS_REG 0xe
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#define RK817_RTC_INT_REG 0xf
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#define RK817_RTC_COMP_LSB_REG 0x10
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#define RK817_RTC_COMP_MSB_REG 0x11
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#define RK817_POWER_EN_REG(i) (0xb1 + (i))
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#define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i))
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#define RK817_POWER_CONFIG (0xb9)
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#define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3)
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#define RK817_BUCK1_ON_VSEL_REG 0xBB
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#define RK817_BUCK1_SLP_VSEL_REG 0xBC
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#define RK817_BUCK2_CONFIG_REG 0xBD
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#define RK817_BUCK2_ON_VSEL_REG 0xBE
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#define RK817_BUCK2_SLP_VSEL_REG 0xBF
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#define RK817_BUCK3_CONFIG_REG 0xC0
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#define RK817_BUCK3_ON_VSEL_REG 0xC1
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#define RK817_BUCK3_SLP_VSEL_REG 0xC2
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|
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#define RK817_BUCK4_CONFIG_REG 0xC3
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#define RK817_BUCK4_ON_VSEL_REG 0xC4
|
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#define RK817_BUCK4_SLP_VSEL_REG 0xC5
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|
|
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#define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2)
|
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#define RK817_BOOST_OTG_CFG (0xde)
|
|
|
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#define RK817_ID_MSB 0xed
|
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#define RK817_ID_LSB 0xee
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|
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#define RK817_SYS_STS 0xf0
|
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#define RK817_SYS_CFG(i) (0xf1 + (i))
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|
|
|
#define RK817_ON_SOURCE_REG 0xf5
|
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#define RK817_OFF_SOURCE_REG 0xf6
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|
|
|
/* INTERRUPT REGISTER */
|
|
#define RK817_INT_STS_REG0 0xf8
|
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#define RK817_INT_STS_MSK_REG0 0xf9
|
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#define RK817_INT_STS_REG1 0xfa
|
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#define RK817_INT_STS_MSK_REG1 0xfb
|
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#define RK817_INT_STS_REG2 0xfc
|
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#define RK817_INT_STS_MSK_REG2 0xfd
|
|
#define RK817_GPIO_INT_CFG 0xfe
|
|
|
|
/* IRQ Definitions */
|
|
#define RK817_IRQ_PWRON_FALL 0
|
|
#define RK817_IRQ_PWRON_RISE 1
|
|
#define RK817_IRQ_PWRON 2
|
|
#define RK817_IRQ_PWMON_LP 3
|
|
#define RK817_IRQ_HOTDIE 4
|
|
#define RK817_IRQ_RTC_ALARM 5
|
|
#define RK817_IRQ_RTC_PERIOD 6
|
|
#define RK817_IRQ_VB_LO 7
|
|
#define RK817_IRQ_PLUG_IN 8
|
|
#define RK817_IRQ_PLUG_OUT 9
|
|
#define RK817_IRQ_CHRG_TERM 10
|
|
#define RK817_IRQ_CHRG_TIME 11
|
|
#define RK817_IRQ_CHRG_TS 12
|
|
#define RK817_IRQ_USB_OV 13
|
|
#define RK817_IRQ_CHRG_IN_CLMP 14
|
|
#define RK817_IRQ_BAT_DIS_ILIM 15
|
|
#define RK817_IRQ_GATE_GPIO 16
|
|
#define RK817_IRQ_TS_GPIO 17
|
|
#define RK817_IRQ_CODEC_PD 18
|
|
#define RK817_IRQ_CODEC_PO 19
|
|
#define RK817_IRQ_CLASSD_MUTE_DONE 20
|
|
#define RK817_IRQ_CLASSD_OCP 21
|
|
#define RK817_IRQ_BAT_OVP 22
|
|
#define RK817_IRQ_CHRG_BAT_HI 23
|
|
#define RK817_IRQ_END (RK817_IRQ_CHRG_BAT_HI + 1)
|
|
|
|
/*
|
|
* rtc_ctrl 0xd
|
|
* same as 808, except bit4
|
|
*/
|
|
#define RK817_RTC_CTRL_RSV4 BIT(4)
|
|
|
|
/* power config 0xb9 */
|
|
#define RK817_BUCK3_FB_RES_MSK BIT(6)
|
|
#define RK817_BUCK3_FB_RES_INTER BIT(6)
|
|
#define RK817_BUCK3_FB_RES_EXT 0
|
|
|
|
/* buck config 0xba */
|
|
#define RK817_RAMP_RATE_OFFSET 6
|
|
#define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET)
|
|
#define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET)
|
|
#define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET)
|
|
#define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET)
|
|
#define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET)
|
|
|
|
/* sys_cfg1 0xf2 */
|
|
#define RK817_HOTDIE_TEMP_MSK (0x3 << 4)
|
|
#define RK817_HOTDIE_85 (0x0 << 4)
|
|
#define RK817_HOTDIE_95 (0x1 << 4)
|
|
#define RK817_HOTDIE_105 (0x2 << 4)
|
|
#define RK817_HOTDIE_115 (0x3 << 4)
|
|
|
|
#define RK817_TSD_TEMP_MSK BIT(6)
|
|
#define RK817_TSD_140 0
|
|
#define RK817_TSD_160 BIT(6)
|
|
|
|
#define RK817_CLK32KOUT2_EN BIT(7)
|
|
|
|
/* sys_cfg3 0xf4 */
|
|
#define RK817_SLPPIN_FUNC_MSK (0x3 << 3)
|
|
#define SLPPIN_NULL_FUN (0x0 << 3)
|
|
#define SLPPIN_SLP_FUN (0x1 << 3)
|
|
#define SLPPIN_DN_FUN (0x2 << 3)
|
|
#define SLPPIN_RST_FUN (0x3 << 3)
|
|
|
|
#define RK817_RST_FUNC_MSK (0x3 << 6)
|
|
#define RK817_RST_FUNC_SFT (6)
|
|
#define RK817_RST_FUNC_CNT (3)
|
|
#define RK817_RST_FUNC_DEV (0) /* reset the dev */
|
|
#define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */
|
|
|
|
#define RK817_SLPPOL_MSK BIT(5)
|
|
#define RK817_SLPPOL_H BIT(5)
|
|
#define RK817_SLPPOL_L (0)
|
|
|
|
/* gpio&int 0xfe */
|
|
#define RK817_INT_POL_MSK BIT(1)
|
|
#define RK817_INT_POL_H BIT(1)
|
|
#define RK817_INT_POL_L 0
|
|
#define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1)
|
|
|
|
enum {
|
|
BUCK_ILMIN_50MA,
|
|
BUCK_ILMIN_100MA,
|
|
BUCK_ILMIN_150MA,
|
|
BUCK_ILMIN_200MA,
|
|
BUCK_ILMIN_250MA,
|
|
BUCK_ILMIN_300MA,
|
|
BUCK_ILMIN_350MA,
|
|
BUCK_ILMIN_400MA,
|
|
};
|
|
|
|
enum {
|
|
BOOST_ILMIN_75MA,
|
|
BOOST_ILMIN_100MA,
|
|
BOOST_ILMIN_125MA,
|
|
BOOST_ILMIN_150MA,
|
|
BOOST_ILMIN_175MA,
|
|
BOOST_ILMIN_200MA,
|
|
BOOST_ILMIN_225MA,
|
|
BOOST_ILMIN_250MA,
|
|
};
|
|
|
|
enum {
|
|
RK805_BUCK1_2_ILMAX_2500MA,
|
|
RK805_BUCK1_2_ILMAX_3000MA,
|
|
RK805_BUCK1_2_ILMAX_3500MA,
|
|
RK805_BUCK1_2_ILMAX_4000MA,
|
|
};
|
|
|
|
enum {
|
|
RK805_BUCK3_ILMAX_1500MA,
|
|
RK805_BUCK3_ILMAX_2000MA,
|
|
RK805_BUCK3_ILMAX_2500MA,
|
|
RK805_BUCK3_ILMAX_3000MA,
|
|
};
|
|
|
|
enum {
|
|
RK805_BUCK4_ILMAX_2000MA,
|
|
RK805_BUCK4_ILMAX_2500MA,
|
|
RK805_BUCK4_ILMAX_3000MA,
|
|
RK805_BUCK4_ILMAX_3500MA,
|
|
};
|
|
|
|
enum {
|
|
RK805_ID = 0x8050,
|
|
RK808_ID = 0x0000,
|
|
RK809_ID = 0x8090,
|
|
RK817_ID = 0x8170,
|
|
RK818_ID = 0x8180,
|
|
};
|
|
|
|
struct rk808 {
|
|
struct i2c_client *i2c;
|
|
struct regmap_irq_chip_data *irq_data;
|
|
struct regmap *regmap;
|
|
long variant;
|
|
const struct regmap_config *regmap_cfg;
|
|
const struct regmap_irq_chip *regmap_irq_chip;
|
|
};
|
|
#endif /* __LINUX_REGULATOR_RK808_H */
|