127 lines
3.4 KiB
C
127 lines
3.4 KiB
C
#ifndef __x8664_PCI_H
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#define __x8664_PCI_H
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#include <asm/io.h>
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#ifdef __KERNEL__
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struct pci_sysdata {
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int node; /* NUMA node */
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void* iommu; /* IOMMU private data */
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};
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extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
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#ifdef CONFIG_CALGARY_IOMMU
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static inline void* pci_iommu(struct pci_bus *bus)
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{
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struct pci_sysdata *sd = bus->sysdata;
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return sd->iommu;
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}
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static inline void set_pci_iommu(struct pci_bus *bus, void *val)
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{
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struct pci_sysdata *sd = bus->sysdata;
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sd->iommu = val;
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}
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#endif /* CONFIG_CALGARY_IOMMU */
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#include <linux/mm.h> /* for struct page */
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/* Can be used to override the logic in pci_scan_bus for skipping
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already-configured bus numbers - to be used for buggy BIOSes
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or architectures with incomplete PCI setup by the loader */
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#ifdef CONFIG_PCI
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extern unsigned int pcibios_assign_all_busses(void);
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#else
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#define pcibios_assign_all_busses() 0
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#endif
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#define pcibios_scan_all_fns(a, b) 0
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extern unsigned long pci_mem_start;
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM (pci_mem_start)
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#define PCIBIOS_MIN_CARDBUS_IO 0x4000
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void pcibios_config_init(void);
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struct pci_bus * pcibios_scan_root(int bus);
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extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
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extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
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void pcibios_set_master(struct pci_dev *dev);
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void pcibios_penalize_isa_irq(int irq, int active);
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struct irq_routing_table *pcibios_get_irq_routing_table(void);
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int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <asm/scatterlist.h>
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#include <linux/string.h>
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#include <asm/page.h>
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extern void pci_iommu_alloc(void);
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extern int iommu_setup(char *opt);
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/* The PCI address space does equal the physical memory
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* address space. The networking and block device layers use
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* this boolean for bounce buffer decisions
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*
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* On AMD64 it mostly equals, but we set it to zero if a hardware
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* IOMMU (gart) of sotware IOMMU (swiotlb) is available.
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*/
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#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
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#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
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__u32 LEN_NAME;
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#define pci_unmap_addr(PTR, ADDR_NAME) \
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((PTR)->ADDR_NAME)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
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(((PTR)->ADDR_NAME) = (VAL))
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#define pci_unmap_len(PTR, LEN_NAME) \
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((PTR)->LEN_NAME)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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#else
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/* No IOMMU */
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
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#define pci_unmap_addr(PTR, ADDR_NAME) (0)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
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#define pci_unmap_len(PTR, LEN_NAME) (0)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
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#endif
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#include <asm-generic/pci-dma-compat.h>
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#endif
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#define HAVE_PCI_MMAP
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extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine);
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#endif /* __KERNEL__ */
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/* generic pci stuff */
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#ifdef CONFIG_PCI
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#include <asm-generic/pci.h>
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#endif
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#endif /* __x8664_PCI_H */
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