166 lines
3.7 KiB
C
166 lines
3.7 KiB
C
/*
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* Apple Peripheral System Controller (PSC)
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*
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* The PSC is used on the AV Macs to control IO functions not handled
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* by the VIAs (Ethernet, DSP, SCC).
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*
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* TO DO:
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*
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* Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
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* persisant interrupt conditions in those registers and I have no idea what
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* they are. Granted it doesn't affect since we're not enabling any interrupts
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* on those levels at the moment, but it would be nice to know. I have a feeling
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* they aren't actually interrupt lines but data lines (to the DSP?)
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/traps.h>
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#include <asm/macintosh.h>
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#include <asm/macints.h>
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#include <asm/mac_psc.h>
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#define DEBUG_PSC
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volatile __u8 *psc;
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EXPORT_SYMBOL_GPL(psc);
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/*
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* Debugging dump, used in various places to see what's going on.
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*/
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static void psc_debug_dump(void)
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{
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int i;
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if (!psc)
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return;
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for (i = 0x30 ; i < 0x70 ; i += 0x10) {
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printk(KERN_DEBUG "PSC #%d: IFR = 0x%02X IER = 0x%02X\n",
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i >> 4,
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(int) psc_read_byte(pIFRbase + i),
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(int) psc_read_byte(pIERbase + i));
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}
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}
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/*
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* Try to kill all DMA channels on the PSC. Not sure how this his
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* supposed to work; this is code lifted from macmace.c and then
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* expanded to cover what I think are the other 7 channels.
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*/
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static __init void psc_dma_die_die_die(void)
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{
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int i;
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for (i = 0 ; i < 9 ; i++) {
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psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
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psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
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psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
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psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
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}
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}
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/*
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* Initialize the PSC. For now this just involves shutting down all
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* interrupt sources using the IERs.
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*/
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void __init psc_init(void)
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{
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int i;
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if (macintosh_config->ident != MAC_MODEL_C660
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&& macintosh_config->ident != MAC_MODEL_Q840)
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{
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psc = NULL;
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return;
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}
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/*
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* The PSC is always at the same spot, but using psc
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* keeps things consistent with the psc_xxxx functions.
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*/
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psc = (void *) PSC_BASE;
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pr_debug("PSC detected at %p\n", psc);
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psc_dma_die_die_die();
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#ifdef DEBUG_PSC
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psc_debug_dump();
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#endif
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/*
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* Mask and clear all possible interrupts
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*/
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for (i = 0x30 ; i < 0x70 ; i += 0x10) {
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psc_write_byte(pIERbase + i, 0x0F);
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psc_write_byte(pIFRbase + i, 0x0F);
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}
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}
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/*
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* PSC interrupt handler. It's a lot like the VIA interrupt handler.
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*/
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static void psc_irq(struct irq_desc *desc)
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{
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unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
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unsigned int irq = irq_desc_get_irq(desc);
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int pIFR = pIFRbase + offset;
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int pIER = pIERbase + offset;
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int irq_num;
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unsigned char irq_bit, events;
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events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
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if (!events)
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return;
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irq_num = irq << 3;
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irq_bit = 1;
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do {
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if (events & irq_bit) {
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psc_write_byte(pIFR, irq_bit);
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generic_handle_irq(irq_num);
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}
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irq_num++;
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irq_bit <<= 1;
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} while (events >= irq_bit);
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}
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/*
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* Register the PSC interrupt dispatchers for autovector interrupts 3-6.
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*/
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void __init psc_register_interrupts(void)
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{
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irq_set_chained_handler_and_data(IRQ_AUTO_3, psc_irq, (void *)0x30);
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irq_set_chained_handler_and_data(IRQ_AUTO_4, psc_irq, (void *)0x40);
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irq_set_chained_handler_and_data(IRQ_AUTO_5, psc_irq, (void *)0x50);
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irq_set_chained_handler_and_data(IRQ_AUTO_6, psc_irq, (void *)0x60);
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}
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void psc_irq_enable(int irq) {
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int irq_src = IRQ_SRC(irq);
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int irq_idx = IRQ_IDX(irq);
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int pIER = pIERbase + (irq_src << 4);
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psc_write_byte(pIER, (1 << irq_idx) | 0x80);
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}
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void psc_irq_disable(int irq) {
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int irq_src = IRQ_SRC(irq);
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int irq_idx = IRQ_IDX(irq);
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int pIER = pIERbase + (irq_src << 4);
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psc_write_byte(pIER, 1 << irq_idx);
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}
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