Chris Wilson 9135583464 drm/i915: Do not overflow the MMADDR write FIFO ... Whilst the GT is powered down (rc6), writes to MMADDR are placed in a FIFO by the System Agent. This is a limited resource, only 64 entries, of which 20 are reserved for Display and PCH writes, and so we must take care not to queue up too many writes. To avoid this, there is counter which we can poll to ensure there are sufficient free entries in the fifo. "Issuing a write to a full FIFO is not supported; at worst it could result in corruption or a system hang." Reported-and-Tested-by: Matt Turner <mattst88@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34056 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>		2011-03-06 09:07:46 +00:00
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drm	drm/i915: Do not overflow the MMADDR write FIFO	2011-03-06 09:07:46 +00:00
stub	gpu/stub: fix acpi_video build error, fix stub kconfig dependencies	2011-02-04 12:48:18 +10:00
vga	Merge remote branch 'linus/master' into drm-intel-fixes	2011-01-24 18:27:32 +00:00
Makefile	gpu: Add Intel GMA500(Poulsbo) Stub Driver	2010-10-26 11:00:13 +10:00