6d56111c92
As an oversight, for GICv2, we accidentally export the GICC_PMR register in the format of the GICH_VMCR.VMPriMask field in the lower 5 bits of a word, meaning that userspace must always use the lower 5 bits to communicate with the KVM device and must shift the value left by 3 places to obtain the actual priority mask level. Since GICv3 supports the full 8 bits of priority masking in the ICH_VMCR, we have to fix the value we export when emulating a GICv2 on top of a hardware GICv3 and exporting the emulated GICv2 state to userspace. Take the chance to clarify this aspect of the ABI. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <cdall@linaro.org> |
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arm-gic-common.h | ||
arm-gic-v3.h | ||
arm-gic.h | ||
arm-vic.h | ||
chained_irq.h | ||
ingenic.h | ||
irq-omap-intc.h | ||
irq-partition-percpu.h | ||
irq-sa11x0.h | ||
metag-ext.h | ||
metag.h | ||
mips-gic.h | ||
mmp.h | ||
mxs.h | ||
versatile-fpga.h | ||
xtensa-mx.h | ||
xtensa-pic.h |