610 lines
16 KiB
C
610 lines
16 KiB
C
/* SPDX-License-Identifier: MIT
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* Copyright (C) 2018 Intel Corp.
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*
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* Authors:
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* Manasi Navare <manasi.d.navare@intel.com>
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*/
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#ifndef DRM_DSC_H_
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#define DRM_DSC_H_
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#include <drm/drm_dp_helper.h>
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/* VESA Display Stream Compression DSC 1.2 constants */
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#define DSC_NUM_BUF_RANGES 15
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#define DSC_MUX_WORD_SIZE_8_10_BPC 48
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#define DSC_MUX_WORD_SIZE_12_BPC 64
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#define DSC_RC_PIXELS_PER_GROUP 3
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#define DSC_SCALE_DECREMENT_INTERVAL_MAX 4095
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#define DSC_RANGE_BPG_OFFSET_MASK 0x3f
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/* DSC Rate Control Constants */
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#define DSC_RC_MODEL_SIZE_CONST 8192
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#define DSC_RC_EDGE_FACTOR_CONST 6
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#define DSC_RC_TGT_OFFSET_HI_CONST 3
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#define DSC_RC_TGT_OFFSET_LO_CONST 3
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/* DSC PPS constants and macros */
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#define DSC_PPS_VERSION_MAJOR_SHIFT 4
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#define DSC_PPS_BPC_SHIFT 4
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#define DSC_PPS_MSB_SHIFT 8
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#define DSC_PPS_LSB_MASK (0xFF << 0)
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#define DSC_PPS_BPP_HIGH_MASK (0x3 << 8)
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#define DSC_PPS_VBR_EN_SHIFT 2
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#define DSC_PPS_SIMPLE422_SHIFT 3
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#define DSC_PPS_CONVERT_RGB_SHIFT 4
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#define DSC_PPS_BLOCK_PRED_EN_SHIFT 5
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#define DSC_PPS_INIT_XMIT_DELAY_HIGH_MASK (0x3 << 8)
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#define DSC_PPS_SCALE_DEC_INT_HIGH_MASK (0xF << 8)
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#define DSC_PPS_RC_TGT_OFFSET_HI_SHIFT 4
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#define DSC_PPS_RC_RANGE_MINQP_SHIFT 11
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#define DSC_PPS_RC_RANGE_MAXQP_SHIFT 6
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#define DSC_PPS_NATIVE_420_SHIFT 1
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#define DSC_1_2_MAX_LINEBUF_DEPTH_BITS 16
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#define DSC_1_2_MAX_LINEBUF_DEPTH_VAL 0
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#define DSC_1_1_MAX_LINEBUF_DEPTH_BITS 13
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/**
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* struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
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*
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* This defines different rate control parameters used by the DSC engine
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* to compress the frame.
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*/
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struct drm_dsc_rc_range_parameters {
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/**
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* @range_min_qp: Min Quantization Parameters allowed for this range
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*/
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u8 range_min_qp;
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/**
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* @range_max_qp: Max Quantization Parameters allowed for this range
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*/
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u8 range_max_qp;
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/**
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* @range_bpg_offset:
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* Bits/group offset to apply to target for this group
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*/
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u8 range_bpg_offset;
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};
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/**
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* struct drm_dsc_config - Parameters required to configure DSC
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*
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* Driver populates this structure with all the parameters required
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* to configure the display stream compression on the source.
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*/
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struct drm_dsc_config {
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/**
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* @line_buf_depth:
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* Bits per component for previous reconstructed line buffer
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*/
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u8 line_buf_depth;
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/**
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* @bits_per_component: Bits per component to code (8/10/12)
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*/
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u8 bits_per_component;
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/**
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* @convert_rgb:
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* Flag to indicate if RGB - YCoCg conversion is needed
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* True if RGB input, False if YCoCg input
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*/
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bool convert_rgb;
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/**
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* @slice_count: Number fo slices per line used by the DSC encoder
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*/
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u8 slice_count;
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/**
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* @slice_width: Width of each slice in pixels
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*/
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u16 slice_width;
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/**
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* @slice_height: Slice height in pixels
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*/
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u16 slice_height;
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/**
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* @simple_422: True if simple 4_2_2 mode is enabled else False
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*/
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bool simple_422;
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/**
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* @pic_width: Width of the input display frame in pixels
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*/
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u16 pic_width;
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/**
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* @pic_height: Vertical height of the input display frame
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*/
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u16 pic_height;
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/**
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* @rc_tgt_offset_high:
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* Offset to bits/group used by RC to determine QP adjustment
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*/
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u8 rc_tgt_offset_high;
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/**
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* @rc_tgt_offset_low:
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* Offset to bits/group used by RC to determine QP adjustment
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*/
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u8 rc_tgt_offset_low;
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/**
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* @bits_per_pixel:
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* Target bits per pixel with 4 fractional bits, bits_per_pixel << 4
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*/
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u16 bits_per_pixel;
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/**
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* @rc_edge_factor:
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* Factor to determine if an edge is present based on the bits produced
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*/
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u8 rc_edge_factor;
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/**
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* @rc_quant_incr_limit1:
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* Slow down incrementing once the range reaches this value
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*/
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u8 rc_quant_incr_limit1;
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/**
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* @rc_quant_incr_limit0:
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* Slow down incrementing once the range reaches this value
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*/
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u8 rc_quant_incr_limit0;
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/**
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* @initial_xmit_delay:
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* Number of pixels to delay the initial transmission
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*/
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u16 initial_xmit_delay;
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/**
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* @initial_dec_delay:
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* Initial decoder delay, number of pixel times that the decoder
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* accumulates data in its rate buffer before starting to decode
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* and output pixels.
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*/
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u16 initial_dec_delay;
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/**
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* @block_pred_enable:
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* True if block prediction is used to code any groups within the
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* picture. False if BP not used
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*/
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bool block_pred_enable;
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/**
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* @first_line_bpg_offset:
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* Number of additional bits allocated for each group on the first
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* line of slice.
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*/
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u8 first_line_bpg_offset;
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/**
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* @initial_offset: Value to use for RC model offset at slice start
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*/
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u16 initial_offset;
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/**
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* @rc_buf_thresh: Thresholds defining each of the buffer ranges
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*/
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u16 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
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/**
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* @rc_range_params:
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* Parameters for each of the RC ranges defined in
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* &struct drm_dsc_rc_range_parameters
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*/
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struct drm_dsc_rc_range_parameters rc_range_params[DSC_NUM_BUF_RANGES];
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/**
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* @rc_model_size: Total size of RC model
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*/
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u16 rc_model_size;
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/**
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* @flatness_min_qp: Minimum QP where flatness information is sent
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*/
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u8 flatness_min_qp;
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/**
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* @flatness_max_qp: Maximum QP where flatness information is sent
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*/
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u8 flatness_max_qp;
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/**
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* @initial_scale_value: Initial value for the scale factor
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*/
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u8 initial_scale_value;
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/**
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* @scale_decrement_interval:
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* Specifies number of group times between decrementing the scale factor
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* at beginning of a slice.
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*/
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u16 scale_decrement_interval;
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/**
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* @scale_increment_interval:
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* Number of group times between incrementing the scale factor value
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* used at the beginning of a slice.
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*/
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u16 scale_increment_interval;
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/**
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* @nfl_bpg_offset: Non first line BPG offset to be used
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*/
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u16 nfl_bpg_offset;
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/**
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* @slice_bpg_offset: BPG offset used to enforce slice bit
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*/
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u16 slice_bpg_offset;
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/**
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* @final_offset: Final RC linear transformation offset value
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*/
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u16 final_offset;
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/**
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* @vbr_enable: True if VBR mode is enabled, false if disabled
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*/
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bool vbr_enable;
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/**
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* @mux_word_size: Mux word size (in bits) for SSM mode
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*/
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u8 mux_word_size;
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/**
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* @slice_chunk_size:
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* The (max) size in bytes of the "chunks" that are used in slice
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* multiplexing.
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*/
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u16 slice_chunk_size;
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/**
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* @rc_bits: Rate control buffer size in bits
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*/
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u16 rc_bits;
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/**
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* @dsc_version_minor: DSC minor version
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*/
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u8 dsc_version_minor;
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/**
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* @dsc_version_major: DSC major version
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*/
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u8 dsc_version_major;
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/**
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* @native_422: True if Native 4:2:2 supported, else false
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*/
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bool native_422;
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/**
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* @native_420: True if Native 4:2:0 supported else false.
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*/
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bool native_420;
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/**
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* @second_line_bpg_offset:
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* Additional bits/grp for seconnd line of slice for native 4:2:0
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*/
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u8 second_line_bpg_offset;
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/**
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* @nsl_bpg_offset:
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* Num of bits deallocated for each grp that is not in second line of
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* slice
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*/
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u16 nsl_bpg_offset;
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/**
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* @second_line_offset_adj:
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* Offset adjustment for second line in Native 4:2:0 mode
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*/
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u16 second_line_offset_adj;
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};
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/**
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* struct picture_parameter_set - Represents 128 bytes of Picture Parameter Set
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*
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* The VESA DSC standard defines picture parameter set (PPS) which display
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* stream compression encoders must communicate to decoders.
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* The PPS is encapsulated in 128 bytes (PPS 0 through PPS 127). The fields in
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* this structure are as per Table 4.1 in Vesa DSC specification v1.1/v1.2.
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* The PPS fields that span over more than a byte should be stored in Big Endian
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* format.
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*/
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struct drm_dsc_picture_parameter_set {
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/**
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* @dsc_version:
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* PPS0[3:0] - dsc_version_minor: Contains Minor version of DSC
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* PPS0[7:4] - dsc_version_major: Contains major version of DSC
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*/
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u8 dsc_version;
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/**
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* @pps_identifier:
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* PPS1[7:0] - Application specific identifier that can be
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* used to differentiate between different PPS tables.
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*/
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u8 pps_identifier;
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/**
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* @pps_reserved:
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* PPS2[7:0]- RESERVED Byte
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*/
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u8 pps_reserved;
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/**
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* @pps_3:
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* PPS3[3:0] - linebuf_depth: Contains linebuffer bit depth used to
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* generate the bitstream. (0x0 - 16 bits for DSC 1.2, 0x8 - 8 bits,
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* 0xA - 10 bits, 0xB - 11 bits, 0xC - 12 bits, 0xD - 13 bits,
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* 0xE - 14 bits for DSC1.2, 0xF - 14 bits for DSC 1.2.
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* PPS3[7:4] - bits_per_component: Bits per component for the original
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* pixels of the encoded picture.
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* 0x0 = 16bpc (allowed only when dsc_version_minor = 0x2)
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* 0x8 = 8bpc, 0xA = 10bpc, 0xC = 12bpc, 0xE = 14bpc (also
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* allowed only when dsc_minor_version = 0x2)
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*/
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u8 pps_3;
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/**
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* @pps_4:
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* PPS4[1:0] -These are the most significant 2 bits of
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* compressed BPP bits_per_pixel[9:0] syntax element.
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* PPS4[2] - vbr_enable: 0 = VBR disabled, 1 = VBR enabled
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* PPS4[3] - simple_422: Indicates if decoder drops samples to
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* reconstruct the 4:2:2 picture.
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* PPS4[4] - Convert_rgb: Indicates if DSC color space conversion is
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* active.
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* PPS4[5] - blobk_pred_enable: Indicates if BP is used to code any
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* groups in picture
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* PPS4[7:6] - Reseved bits
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*/
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u8 pps_4;
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/**
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* @bits_per_pixel_low:
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* PPS5[7:0] - This indicates the lower significant 8 bits of
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* the compressed BPP bits_per_pixel[9:0] element.
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*/
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u8 bits_per_pixel_low;
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/**
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* @pic_height:
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* PPS6[7:0], PPS7[7:0] -pic_height: Specifies the number of pixel rows
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* within the raster.
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*/
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__be16 pic_height;
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/**
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* @pic_width:
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* PPS8[7:0], PPS9[7:0] - pic_width: Number of pixel columns within
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* the raster.
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*/
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__be16 pic_width;
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/**
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* @slice_height:
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* PPS10[7:0], PPS11[7:0] - Slice height in units of pixels.
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*/
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__be16 slice_height;
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/**
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* @slice_width:
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* PPS12[7:0], PPS13[7:0] - Slice width in terms of pixels.
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*/
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__be16 slice_width;
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/**
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* @chunk_size:
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* PPS14[7:0], PPS15[7:0] - Size in units of bytes of the chunks
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* that are used for slice multiplexing.
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*/
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__be16 chunk_size;
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/**
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* @initial_xmit_delay_high:
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* PPS16[1:0] - Most Significant two bits of initial transmission delay.
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* It specifies the number of pixel times that the encoder waits before
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* transmitting data from its rate buffer.
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* PPS16[7:2] - Reserved
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*/
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u8 initial_xmit_delay_high;
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/**
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* @initial_xmit_delay_low:
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* PPS17[7:0] - Least significant 8 bits of initial transmission delay.
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*/
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u8 initial_xmit_delay_low;
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/**
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* @initial_dec_delay:
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*
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* PPS18[7:0], PPS19[7:0] - Initial decoding delay which is the number
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* of pixel times that the decoder accumulates data in its rate buffer
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* before starting to decode and output pixels.
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*/
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__be16 initial_dec_delay;
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/**
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* @pps20_reserved:
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*
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* PPS20[7:0] - Reserved
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*/
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u8 pps20_reserved;
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/**
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* @initial_scale_value:
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* PPS21[5:0] - Initial rcXformScale factor used at beginning
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* of a slice.
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* PPS21[7:6] - Reserved
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*/
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u8 initial_scale_value;
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/**
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* @scale_increment_interval:
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* PPS22[7:0], PPS23[7:0] - Number of group times between incrementing
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* the rcXformScale factor at end of a slice.
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*/
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__be16 scale_increment_interval;
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/**
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* @scale_decrement_interval_high:
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* PPS24[3:0] - Higher 4 bits indicating number of group times between
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* decrementing the rcXformScale factor at beginning of a slice.
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* PPS24[7:4] - Reserved
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*/
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u8 scale_decrement_interval_high;
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/**
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* @scale_decrement_interval_low:
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* PPS25[7:0] - Lower 8 bits of scale decrement interval
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*/
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u8 scale_decrement_interval_low;
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/**
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* @pps26_reserved:
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* PPS26[7:0]
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*/
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u8 pps26_reserved;
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/**
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* @first_line_bpg_offset:
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* PPS27[4:0] - Number of additional bits that are allocated
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* for each group on first line of a slice.
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* PPS27[7:5] - Reserved
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*/
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u8 first_line_bpg_offset;
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/**
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* @nfl_bpg_offset:
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* PPS28[7:0], PPS29[7:0] - Number of bits including frac bits
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* deallocated for each group for groups after the first line of slice.
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*/
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__be16 nfl_bpg_offset;
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/**
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* @slice_bpg_offset:
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* PPS30, PPS31[7:0] - Number of bits that are deallocated for each
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* group to enforce the slice constraint.
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*/
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__be16 slice_bpg_offset;
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/**
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* @initial_offset:
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* PPS32,33[7:0] - Initial value for rcXformOffset
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*/
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__be16 initial_offset;
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/**
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* @final_offset:
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* PPS34,35[7:0] - Maximum end-of-slice value for rcXformOffset
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*/
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__be16 final_offset;
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/**
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* @flatness_min_qp:
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* PPS36[4:0] - Minimum QP at which flatness is signaled and
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* flatness QP adjustment is made.
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* PPS36[7:5] - Reserved
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*/
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u8 flatness_min_qp;
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/**
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* @flatness_max_qp:
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* PPS37[4:0] - Max QP at which flatness is signalled and
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* the flatness adjustment is made.
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* PPS37[7:5] - Reserved
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*/
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u8 flatness_max_qp;
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/**
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* @rc_model_size:
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* PPS38,39[7:0] - Number of bits within RC Model.
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*/
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__be16 rc_model_size;
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/**
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* @rc_edge_factor:
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* PPS40[3:0] - Ratio of current activity vs, previous
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* activity to determine presence of edge.
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* PPS40[7:4] - Reserved
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*/
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u8 rc_edge_factor;
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/**
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* @rc_quant_incr_limit0:
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* PPS41[4:0] - QP threshold used in short term RC
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* PPS41[7:5] - Reserved
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*/
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u8 rc_quant_incr_limit0;
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/**
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* @rc_quant_incr_limit1:
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* PPS42[4:0] - QP threshold used in short term RC
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* PPS42[7:5] - Reserved
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*/
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u8 rc_quant_incr_limit1;
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/**
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* @rc_tgt_offset:
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* PPS43[3:0] - Lower end of the variability range around the target
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* bits per group that is allowed by short term RC.
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* PPS43[7:4]- Upper end of the variability range around the target
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* bits per group that i allowed by short term rc.
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*/
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u8 rc_tgt_offset;
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/**
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* @rc_buf_thresh:
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* PPS44[7:0] - PPS57[7:0] - Specifies the thresholds in RC model for
|
|
* the 15 ranges defined by 14 thresholds.
|
|
*/
|
|
u8 rc_buf_thresh[DSC_NUM_BUF_RANGES - 1];
|
|
/**
|
|
* @rc_range_parameters:
|
|
* PPS58[7:0] - PPS87[7:0]
|
|
* Parameters that correspond to each of the 15 ranges.
|
|
*/
|
|
__be16 rc_range_parameters[DSC_NUM_BUF_RANGES];
|
|
/**
|
|
* @native_422_420:
|
|
* PPS88[0] - 0 = Native 4:2:2 not used
|
|
* 1 = Native 4:2:2 used
|
|
* PPS88[1] - 0 = Native 4:2:0 not use
|
|
* 1 = Native 4:2:0 used
|
|
* PPS88[7:2] - Reserved 6 bits
|
|
*/
|
|
u8 native_422_420;
|
|
/**
|
|
* @second_line_bpg_offset:
|
|
* PPS89[4:0] - Additional bits/group budget for the
|
|
* second line of a slice in Native 4:2:0 mode.
|
|
* Set to 0 if DSC minor version is 1 or native420 is 0.
|
|
* PPS89[7:5] - Reserved
|
|
*/
|
|
u8 second_line_bpg_offset;
|
|
/**
|
|
* @nsl_bpg_offset:
|
|
* PPS90[7:0], PPS91[7:0] - Number of bits that are deallocated
|
|
* for each group that is not in the second line of a slice.
|
|
*/
|
|
__be16 nsl_bpg_offset;
|
|
/**
|
|
* @second_line_offset_adj:
|
|
* PPS92[7:0], PPS93[7:0] - Used as offset adjustment for the second
|
|
* line in Native 4:2:0 mode.
|
|
*/
|
|
__be16 second_line_offset_adj;
|
|
/**
|
|
* @pps_long_94_reserved:
|
|
* PPS 94, 95, 96, 97 - Reserved
|
|
*/
|
|
u32 pps_long_94_reserved;
|
|
/**
|
|
* @pps_long_98_reserved:
|
|
* PPS 98, 99, 100, 101 - Reserved
|
|
*/
|
|
u32 pps_long_98_reserved;
|
|
/**
|
|
* @pps_long_102_reserved:
|
|
* PPS 102, 103, 104, 105 - Reserved
|
|
*/
|
|
u32 pps_long_102_reserved;
|
|
/**
|
|
* @pps_long_106_reserved:
|
|
* PPS 106, 107, 108, 109 - reserved
|
|
*/
|
|
u32 pps_long_106_reserved;
|
|
/**
|
|
* @pps_long_110_reserved:
|
|
* PPS 110, 111, 112, 113 - reserved
|
|
*/
|
|
u32 pps_long_110_reserved;
|
|
/**
|
|
* @pps_long_114_reserved:
|
|
* PPS 114 - 117 - reserved
|
|
*/
|
|
u32 pps_long_114_reserved;
|
|
/**
|
|
* @pps_long_118_reserved:
|
|
* PPS 118 - 121 - reserved
|
|
*/
|
|
u32 pps_long_118_reserved;
|
|
/**
|
|
* @pps_long_122_reserved:
|
|
* PPS 122- 125 - reserved
|
|
*/
|
|
u32 pps_long_122_reserved;
|
|
/**
|
|
* @pps_short_126_reserved:
|
|
* PPS 126, 127 - reserved
|
|
*/
|
|
__be16 pps_short_126_reserved;
|
|
} __packed;
|
|
|
|
/**
|
|
* struct drm_dsc_pps_infoframe - DSC infoframe carrying the Picture Parameter
|
|
* Set Metadata
|
|
*
|
|
* This structure represents the DSC PPS infoframe required to send the Picture
|
|
* Parameter Set metadata required before enabling VESA Display Stream
|
|
* Compression. This is based on the DP Secondary Data Packet structure and
|
|
* comprises of SDP Header as defined &struct struct dp_sdp_header in drm_dp_helper.h
|
|
* and PPS payload defined in &struct drm_dsc_picture_parameter_set.
|
|
*
|
|
* @pps_header: Header for PPS as per DP SDP header format of type
|
|
* &struct dp_sdp_header
|
|
* @pps_payload: PPS payload fields as per DSC specification Table 4-1
|
|
* as represented in &struct drm_dsc_picture_parameter_set
|
|
*/
|
|
struct drm_dsc_pps_infoframe {
|
|
struct dp_sdp_header pps_header;
|
|
struct drm_dsc_picture_parameter_set pps_payload;
|
|
} __packed;
|
|
|
|
void drm_dsc_dp_pps_header_init(struct dp_sdp_header *pps_header);
|
|
void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_sdp,
|
|
const struct drm_dsc_config *dsc_cfg);
|
|
int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg);
|
|
|
|
#endif /* _DRM_DSC_H_ */
|