141 lines
6.0 KiB
Plaintext
141 lines
6.0 KiB
Plaintext
==============
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DMA attributes
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==============
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This document describes the semantics of the DMA attributes that are
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defined in linux/dma-mapping.h.
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DMA_ATTR_WEAK_ORDERING
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----------------------
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DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
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may be weakly ordered, that is that reads and writes may pass each other.
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Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
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those that do not will simply ignore the attribute and exhibit default
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behavior.
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DMA_ATTR_WRITE_COMBINE
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----------------------
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DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
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buffered to improve performance.
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Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
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those that do not will simply ignore the attribute and exhibit default
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behavior.
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DMA_ATTR_NON_CONSISTENT
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-----------------------
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DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
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consistent or non-consistent memory as it sees fit. By using this API,
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you are guaranteeing to the platform that you have all the correct and
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necessary sync points for this memory in the driver.
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DMA_ATTR_NO_KERNEL_MAPPING
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--------------------------
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DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel
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virtual mapping for the allocated buffer. On some architectures creating
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such mapping is non-trivial task and consumes very limited resources
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(like kernel virtual address space or dma consistent address space).
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Buffers allocated with this attribute can be only passed to user space
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by calling dma_mmap_attrs(). By using this API, you are guaranteeing
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that you won't dereference the pointer returned by dma_alloc_attr(). You
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can treat it as a cookie that must be passed to dma_mmap_attrs() and
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dma_free_attrs(). Make sure that both of these also get this attribute
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set on each call.
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Since it is optional for platforms to implement
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DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the
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attribute and exhibit default behavior.
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DMA_ATTR_SKIP_CPU_SYNC
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----------------------
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By default dma_map_{single,page,sg} functions family transfer a given
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buffer from CPU domain to device domain. Some advanced use cases might
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require sharing a buffer between more than one device. This requires
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having a mapping created separately for each device and is usually
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performed by calling dma_map_{single,page,sg} function more than once
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for the given buffer with device pointer to each device taking part in
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the buffer sharing. The first call transfers a buffer from 'CPU' domain
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to 'device' domain, what synchronizes CPU caches for the given region
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(usually it means that the cache has been flushed or invalidated
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depending on the dma direction). However, next calls to
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dma_map_{single,page,sg}() for other devices will perform exactly the
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same synchronization operation on the CPU cache. CPU cache synchronization
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might be a time consuming operation, especially if the buffers are
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large, so it is highly recommended to avoid it if possible.
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DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of
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the CPU cache for the given buffer assuming that it has been already
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transferred to 'device' domain. This attribute can be also used for
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dma_unmap_{single,page,sg} functions family to force buffer to stay in
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device domain after releasing a mapping for it. Use this attribute with
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care!
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DMA_ATTR_FORCE_CONTIGUOUS
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-------------------------
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By default DMA-mapping subsystem is allowed to assemble the buffer
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allocated by dma_alloc_attrs() function from individual pages if it can
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be mapped as contiguous chunk into device dma address space. By
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specifying this attribute the allocated buffer is forced to be contiguous
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also in physical memory.
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DMA_ATTR_ALLOC_SINGLE_PAGES
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---------------------------
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This is a hint to the DMA-mapping subsystem that it's probably not worth
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the time to try to allocate memory to in a way that gives better TLB
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efficiency (AKA it's not worth trying to build the mapping out of larger
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pages). You might want to specify this if:
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- You know that the accesses to this memory won't thrash the TLB.
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You might know that the accesses are likely to be sequential or
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that they aren't sequential but it's unlikely you'll ping-pong
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between many addresses that are likely to be in different physical
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pages.
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- You know that the penalty of TLB misses while accessing the
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memory will be small enough to be inconsequential. If you are
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doing a heavy operation like decryption or decompression this
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might be the case.
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- You know that the DMA mapping is fairly transitory. If you expect
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the mapping to have a short lifetime then it may be worth it to
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optimize allocation (avoid coming up with large pages) instead of
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getting the slight performance win of larger pages.
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Setting this hint doesn't guarantee that you won't get huge pages, but it
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means that we won't try quite as hard to get them.
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.. note:: At the moment DMA_ATTR_ALLOC_SINGLE_PAGES is only implemented on ARM,
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though ARM64 patches will likely be posted soon.
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DMA_ATTR_NO_WARN
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----------------
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This tells the DMA-mapping subsystem to suppress allocation failure reports
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(similarly to __GFP_NOWARN).
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On some architectures allocation failures are reported with error messages
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to the system logs. Although this can help to identify and debug problems,
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drivers which handle failures (eg, retry later) have no problems with them,
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and can actually flood the system logs with error messages that aren't any
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problem at all, depending on the implementation of the retry mechanism.
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So, this provides a way for drivers to avoid those error messages on calls
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where allocation failures are not a problem, and shouldn't bother the logs.
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.. note:: At the moment DMA_ATTR_NO_WARN is only implemented on PowerPC.
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DMA_ATTR_PRIVILEGED
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-------------------
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Some advanced peripherals such as remote processors and GPUs perform
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accesses to DMA buffers in both privileged "supervisor" and unprivileged
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"user" modes. This attribute is used to indicate to the DMA-mapping
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subsystem that the buffer is fully accessible at the elevated privilege
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level (and ideally inaccessible or at least read-only at the
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lesser-privileged levels).
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