36 lines
1018 B
C
36 lines
1018 B
C
/*
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* arch/arm/mach-iop32x/include/mach/iop32x.h
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*
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* Intel IOP32X Chip definitions
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*
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* Author: Rory Bolt <rorybolt@pacbell.net>
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* Copyright (C) 2002 Rory Bolt
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* Copyright (C) 2004 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __IOP32X_H
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#define __IOP32X_H
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/*
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* Peripherals that are shared between the iop32x and iop33x but
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* located at different addresses.
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*/
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#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))
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#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
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#include <asm/hardware/iop3xx.h>
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/* ATU Parameters
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* set up a 1:1 bus to physical ram relationship
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* w/ physical ram on top of pci in the memory map
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*/
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#define IOP32X_MAX_RAM_SIZE 0x40000000UL
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#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE
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#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000
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#endif
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