139 lines
3.3 KiB
C
139 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* AR71xx Reset Controller Driver
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* Author: Alban Bedel
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*
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* Copyright (C) 2015 Alban Bedel <albeu@free.fr>
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*/
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#include <linux/io.h>
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#include <linux/init.h>
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#include <linux/mod_devicetable.h>
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/reboot.h>
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struct ath79_reset {
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struct reset_controller_dev rcdev;
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struct notifier_block restart_nb;
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void __iomem *base;
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spinlock_t lock;
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};
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#define FULL_CHIP_RESET 24
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static int ath79_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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struct ath79_reset *ath79_reset =
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container_of(rcdev, struct ath79_reset, rcdev);
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unsigned long flags;
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u32 val;
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spin_lock_irqsave(&ath79_reset->lock, flags);
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val = readl(ath79_reset->base);
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if (assert)
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val |= BIT(id);
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else
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val &= ~BIT(id);
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writel(val, ath79_reset->base);
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spin_unlock_irqrestore(&ath79_reset->lock, flags);
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return 0;
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}
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static int ath79_reset_assert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return ath79_reset_update(rcdev, id, true);
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}
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static int ath79_reset_deassert(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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return ath79_reset_update(rcdev, id, false);
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}
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static int ath79_reset_status(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct ath79_reset *ath79_reset =
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container_of(rcdev, struct ath79_reset, rcdev);
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u32 val;
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val = readl(ath79_reset->base);
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return !!(val & BIT(id));
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}
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static const struct reset_control_ops ath79_reset_ops = {
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.assert = ath79_reset_assert,
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.deassert = ath79_reset_deassert,
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.status = ath79_reset_status,
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};
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static int ath79_reset_restart_handler(struct notifier_block *nb,
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unsigned long action, void *data)
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{
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struct ath79_reset *ath79_reset =
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container_of(nb, struct ath79_reset, restart_nb);
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ath79_reset_assert(&ath79_reset->rcdev, FULL_CHIP_RESET);
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return NOTIFY_DONE;
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}
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static int ath79_reset_probe(struct platform_device *pdev)
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{
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struct ath79_reset *ath79_reset;
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struct resource *res;
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int err;
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ath79_reset = devm_kzalloc(&pdev->dev,
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sizeof(*ath79_reset), GFP_KERNEL);
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if (!ath79_reset)
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return -ENOMEM;
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platform_set_drvdata(pdev, ath79_reset);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ath79_reset->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(ath79_reset->base))
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return PTR_ERR(ath79_reset->base);
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spin_lock_init(&ath79_reset->lock);
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ath79_reset->rcdev.ops = &ath79_reset_ops;
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ath79_reset->rcdev.owner = THIS_MODULE;
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ath79_reset->rcdev.of_node = pdev->dev.of_node;
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ath79_reset->rcdev.of_reset_n_cells = 1;
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ath79_reset->rcdev.nr_resets = 32;
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err = devm_reset_controller_register(&pdev->dev, &ath79_reset->rcdev);
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if (err)
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return err;
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ath79_reset->restart_nb.notifier_call = ath79_reset_restart_handler;
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ath79_reset->restart_nb.priority = 128;
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err = register_restart_handler(&ath79_reset->restart_nb);
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if (err)
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dev_warn(&pdev->dev, "Failed to register restart handler\n");
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return 0;
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}
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static const struct of_device_id ath79_reset_dt_ids[] = {
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{ .compatible = "qca,ar7100-reset", },
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{ },
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};
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static struct platform_driver ath79_reset_driver = {
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.probe = ath79_reset_probe,
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.driver = {
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.name = "ath79-reset",
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.of_match_table = ath79_reset_dt_ids,
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.suppress_bind_attrs = true,
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},
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};
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builtin_platform_driver(ath79_reset_driver);
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