239 lines
6.2 KiB
C
239 lines
6.2 KiB
C
/*
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* GPIO driver for EXAR XRA1403 16-bit GPIO expander
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*
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* Copyright (c) 2017, General Electric Company
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/bitops.h>
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#include <linux/gpio/driver.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/seq_file.h>
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#include <linux/spi/spi.h>
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#include <linux/regmap.h>
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/* XRA1403 registers */
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#define XRA_GSR 0x00 /* GPIO State */
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#define XRA_OCR 0x02 /* Output Control */
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#define XRA_PIR 0x04 /* Input Polarity Inversion */
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#define XRA_GCR 0x06 /* GPIO Configuration */
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#define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */
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#define XRA_IER 0x0A /* Input Interrupt Enable */
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#define XRA_TSCR 0x0C /* Output Three-State Control */
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#define XRA_ISR 0x0E /* Input Interrupt Status */
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#define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */
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#define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */
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#define XRA_IFR 0x14 /* Input Filter Enable/Disable */
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#define XRA_LAST 0x15 /* Bounds */
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struct xra1403 {
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struct gpio_chip chip;
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struct regmap *regmap;
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};
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static const struct regmap_config xra1403_regmap_cfg = {
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.reg_bits = 7,
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.pad_bits = 1,
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.val_bits = 8,
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.max_register = XRA_LAST,
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};
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static unsigned int to_reg(unsigned int reg, unsigned int offset)
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{
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return reg + (offset > 7);
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}
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static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
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{
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struct xra1403 *xra = gpiochip_get_data(chip);
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return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
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BIT(offset % 8), BIT(offset % 8));
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}
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static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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int ret;
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struct xra1403 *xra = gpiochip_get_data(chip);
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ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
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BIT(offset % 8), 0);
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if (ret)
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return ret;
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ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
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BIT(offset % 8), value ? BIT(offset % 8) : 0);
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return ret;
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}
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static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
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{
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int ret;
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unsigned int val;
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struct xra1403 *xra = gpiochip_get_data(chip);
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ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
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if (ret)
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return ret;
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return !!(val & BIT(offset % 8));
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}
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static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
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{
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int ret;
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unsigned int val;
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struct xra1403 *xra = gpiochip_get_data(chip);
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ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
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if (ret)
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return ret;
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return !!(val & BIT(offset % 8));
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}
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static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
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{
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int ret;
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struct xra1403 *xra = gpiochip_get_data(chip);
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ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
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BIT(offset % 8), value ? BIT(offset % 8) : 0);
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if (ret)
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dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
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offset, ret);
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}
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#ifdef CONFIG_DEBUG_FS
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static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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{
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int reg;
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struct xra1403 *xra = gpiochip_get_data(chip);
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int value[XRA_LAST];
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int i;
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unsigned int gcr;
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unsigned int gsr;
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seq_puts(s, "xra reg:");
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for (reg = 0; reg <= XRA_LAST; reg++)
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seq_printf(s, " %2.2x", reg);
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seq_puts(s, "\n value:");
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for (reg = 0; reg < XRA_LAST; reg++) {
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regmap_read(xra->regmap, reg, &value[reg]);
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seq_printf(s, " %2.2x", value[reg]);
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}
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seq_puts(s, "\n");
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gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
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gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
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for (i = 0; i < chip->ngpio; i++) {
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const char *label = gpiochip_is_requested(chip, i);
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if (!label)
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continue;
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seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
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chip->base + i, label,
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(gcr & BIT(i)) ? "in" : "out",
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(gsr & BIT(i)) ? "hi" : "lo");
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}
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}
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#else
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#define xra1403_dbg_show NULL
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#endif
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static int xra1403_probe(struct spi_device *spi)
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{
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struct xra1403 *xra;
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struct gpio_desc *reset_gpio;
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int ret;
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xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
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if (!xra)
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return -ENOMEM;
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/* bring the chip out of reset if reset pin is provided*/
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reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(reset_gpio))
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dev_warn(&spi->dev, "Could not get reset-gpios\n");
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xra->chip.direction_input = xra1403_direction_input;
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xra->chip.direction_output = xra1403_direction_output;
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xra->chip.get_direction = xra1403_get_direction;
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xra->chip.get = xra1403_get;
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xra->chip.set = xra1403_set;
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xra->chip.dbg_show = xra1403_dbg_show;
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xra->chip.ngpio = 16;
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xra->chip.label = "xra1403";
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xra->chip.base = -1;
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xra->chip.can_sleep = true;
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xra->chip.parent = &spi->dev;
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xra->chip.owner = THIS_MODULE;
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xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
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if (IS_ERR(xra->regmap)) {
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ret = PTR_ERR(xra->regmap);
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dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
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return ret;
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}
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ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
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if (ret < 0) {
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dev_err(&spi->dev, "Unable to register gpiochip\n");
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return ret;
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}
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spi_set_drvdata(spi, xra);
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return 0;
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}
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static const struct spi_device_id xra1403_ids[] = {
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{ "xra1403" },
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{},
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};
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MODULE_DEVICE_TABLE(spi, xra1403_ids);
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static const struct of_device_id xra1403_spi_of_match[] = {
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{ .compatible = "exar,xra1403" },
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{},
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};
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MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
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static struct spi_driver xra1403_driver = {
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.probe = xra1403_probe,
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.id_table = xra1403_ids,
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.driver = {
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.name = "xra1403",
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.of_match_table = of_match_ptr(xra1403_spi_of_match),
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},
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};
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module_spi_driver(xra1403_driver);
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MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
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MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
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MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
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MODULE_LICENSE("GPL v2");
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