146 lines
3.4 KiB
ArmAsm
146 lines
3.4 KiB
ArmAsm
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/kvm_arm.h>
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#include <asm/kvm_mmu.h>
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#include <asm/pgtable-hwdef.h>
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.text
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.pushsection .hyp.idmap.text, "ax"
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.align 11
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ENTRY(__kvm_hyp_init)
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ventry __invalid // Synchronous EL2t
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ventry __invalid // IRQ EL2t
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ventry __invalid // FIQ EL2t
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ventry __invalid // Error EL2t
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ventry __invalid // Synchronous EL2h
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ventry __invalid // IRQ EL2h
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ventry __invalid // FIQ EL2h
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ventry __invalid // Error EL2h
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ventry __do_hyp_init // Synchronous 64-bit EL1
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ventry __invalid // IRQ 64-bit EL1
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ventry __invalid // FIQ 64-bit EL1
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ventry __invalid // Error 64-bit EL1
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ventry __invalid // Synchronous 32-bit EL1
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ventry __invalid // IRQ 32-bit EL1
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ventry __invalid // FIQ 32-bit EL1
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ventry __invalid // Error 32-bit EL1
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__invalid:
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b .
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/*
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* x0: HYP boot pgd
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* x1: HYP pgd
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* x2: HYP stack
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* x3: HYP vectors
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*/
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__do_hyp_init:
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msr ttbr0_el2, x0
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mrs x4, tcr_el1
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ldr x5, =TCR_EL2_MASK
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and x4, x4, x5
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ldr x5, =TCR_EL2_FLAGS
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orr x4, x4, x5
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#ifndef CONFIG_ARM64_VA_BITS_48
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/*
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* If we are running with VA_BITS < 48, we may be running with an extra
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* level of translation in the ID map. This is only the case if system
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* RAM is out of range for the currently configured page size and number
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* of translation levels, in which case we will also need the extra
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* level for the HYP ID map, or we won't be able to enable the EL2 MMU.
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*
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* However, at EL2, there is only one TTBR register, and we can't switch
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* between translation tables *and* update TCR_EL2.T0SZ at the same
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* time. Bottom line: we need the extra level in *both* our translation
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* tables.
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*
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* So use the same T0SZ value we use for the ID map.
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*/
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ldr_l x5, idmap_t0sz
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bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
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#endif
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msr tcr_el2, x4
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ldr x4, =VTCR_EL2_FLAGS
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/*
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* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
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* VTCR_EL2.
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*/
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mrs x5, ID_AA64MMFR0_EL1
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bfi x4, x5, #16, #3
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msr vtcr_el2, x4
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mrs x4, mair_el1
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msr mair_el2, x4
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isb
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/* Invalidate the stale TLBs from Bootloader */
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tlbi alle2
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dsb sy
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mrs x4, sctlr_el2
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and x4, x4, #SCTLR_EL2_EE // preserve endianness of EL2
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ldr x5, =SCTLR_EL2_FLAGS
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orr x4, x4, x5
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msr sctlr_el2, x4
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isb
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/* Skip the trampoline dance if we merged the boot and runtime PGDs */
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cmp x0, x1
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b.eq merged
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/* MMU is now enabled. Get ready for the trampoline dance */
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ldr x4, =TRAMPOLINE_VA
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adr x5, target
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bfi x4, x5, #0, #PAGE_SHIFT
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br x4
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target: /* We're now in the trampoline code, switch page tables */
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msr ttbr0_el2, x1
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isb
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/* Invalidate the old TLBs */
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tlbi alle2
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dsb sy
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merged:
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/* Set the stack and new vectors */
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kern_hyp_va x2
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mov sp, x2
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kern_hyp_va x3
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msr vbar_el2, x3
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/* Hello, World! */
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eret
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ENDPROC(__kvm_hyp_init)
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.ltorg
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.popsection
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