301 lines
8.3 KiB
C
301 lines
8.3 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* Support the cycle counter clocksource and tile timer clock event device.
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*/
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/hardirq.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/timekeeper_internal.h>
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#include <asm/irq_regs.h>
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#include <asm/traps.h>
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#include <asm/vdso.h>
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#include <hv/hypervisor.h>
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#include <arch/interrupts.h>
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#include <arch/spr_def.h>
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/*
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* Define the cycle counter clock source.
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*/
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/* How many cycles per second we are running at. */
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static cycles_t cycles_per_sec __write_once;
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cycles_t get_clock_rate(void)
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{
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return cycles_per_sec;
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}
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#if CHIP_HAS_SPLIT_CYCLE()
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cycles_t get_cycles(void)
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{
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unsigned int high = __insn_mfspr(SPR_CYCLE_HIGH);
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unsigned int low = __insn_mfspr(SPR_CYCLE_LOW);
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unsigned int high2 = __insn_mfspr(SPR_CYCLE_HIGH);
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while (unlikely(high != high2)) {
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low = __insn_mfspr(SPR_CYCLE_LOW);
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high = high2;
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high2 = __insn_mfspr(SPR_CYCLE_HIGH);
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}
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return (((cycles_t)high) << 32) | low;
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}
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EXPORT_SYMBOL(get_cycles);
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#endif
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/*
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* We use a relatively small shift value so that sched_clock()
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* won't wrap around very often.
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*/
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#define SCHED_CLOCK_SHIFT 10
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static unsigned long sched_clock_mult __write_once;
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static cycles_t clocksource_get_cycles(struct clocksource *cs)
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{
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return get_cycles();
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}
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static struct clocksource cycle_counter_cs = {
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.name = "cycle counter",
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.rating = 300,
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.read = clocksource_get_cycles,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/*
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* Called very early from setup_arch() to set cycles_per_sec.
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* We initialize it early so we can use it to set up loops_per_jiffy.
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*/
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void __init setup_clock(void)
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{
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cycles_per_sec = hv_sysconf(HV_SYSCONF_CPU_SPEED);
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sched_clock_mult =
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clocksource_hz2mult(cycles_per_sec, SCHED_CLOCK_SHIFT);
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}
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void __init calibrate_delay(void)
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{
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loops_per_jiffy = get_clock_rate() / HZ;
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pr_info("Clock rate yields %lu.%02lu BogoMIPS (lpj=%lu)\n",
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loops_per_jiffy/(500000/HZ),
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(loops_per_jiffy/(5000/HZ)) % 100, loops_per_jiffy);
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}
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/* Called fairly late in init/main.c, but before we go smp. */
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void __init time_init(void)
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{
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/* Initialize and register the clock source. */
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clocksource_register_hz(&cycle_counter_cs, cycles_per_sec);
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/* Start up the tile-timer interrupt source on the boot cpu. */
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setup_tile_timer();
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}
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/*
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* Define the tile timer clock event device. The timer is driven by
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* the TILE_TIMER_CONTROL register, which consists of a 31-bit down
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* counter, plus bit 31, which signifies that the counter has wrapped
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* from zero to (2**31) - 1. The INT_TILE_TIMER interrupt will be
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* raised as long as bit 31 is set.
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*
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* The TILE_MINSEC value represents the largest range of real-time
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* we can possibly cover with the timer, based on MAX_TICK combined
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* with the slowest reasonable clock rate we might run at.
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*/
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#define MAX_TICK 0x7fffffff /* we have 31 bits of countdown timer */
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#define TILE_MINSEC 5 /* timer covers no more than 5 seconds */
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static int tile_timer_set_next_event(unsigned long ticks,
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struct clock_event_device *evt)
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{
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BUG_ON(ticks > MAX_TICK);
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__insn_mtspr(SPR_TILE_TIMER_CONTROL, ticks);
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arch_local_irq_unmask_now(INT_TILE_TIMER);
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return 0;
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}
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/*
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* Whenever anyone tries to change modes, we just mask interrupts
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* and wait for the next event to get set.
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*/
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static void tile_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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arch_local_irq_mask_now(INT_TILE_TIMER);
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}
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/*
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* Set min_delta_ns to 1 microsecond, since it takes about
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* that long to fire the interrupt.
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*/
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static DEFINE_PER_CPU(struct clock_event_device, tile_timer) = {
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.name = "tile timer",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.min_delta_ns = 1000,
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.rating = 100,
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.irq = -1,
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.set_next_event = tile_timer_set_next_event,
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.set_mode = tile_timer_set_mode,
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};
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void setup_tile_timer(void)
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{
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struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
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/* Fill in fields that are speed-specific. */
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clockevents_calc_mult_shift(evt, cycles_per_sec, TILE_MINSEC);
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evt->max_delta_ns = clockevent_delta2ns(MAX_TICK, evt);
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/* Mark as being for this cpu only. */
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evt->cpumask = cpumask_of(smp_processor_id());
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/* Start out with timer not firing. */
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arch_local_irq_mask_now(INT_TILE_TIMER);
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/* Register tile timer. */
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clockevents_register_device(evt);
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}
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/* Called from the interrupt vector. */
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void do_timer_interrupt(struct pt_regs *regs, int fault_num)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
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/*
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* Mask the timer interrupt here, since we are a oneshot timer
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* and there are now by definition no events pending.
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*/
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arch_local_irq_mask(INT_TILE_TIMER);
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/* Track time spent here in an interrupt context */
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irq_enter();
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/* Track interrupt count. */
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__this_cpu_inc(irq_stat.irq_timer_count);
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/* Call the generic timer handler */
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evt->event_handler(evt);
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/*
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* Track time spent against the current process again and
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* process any softirqs if they are waiting.
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*/
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irq_exit();
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set_irq_regs(old_regs);
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}
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/*
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* Scheduler clock - returns current time in nanosec units.
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* Note that with LOCKDEP, this is called during lockdep_init(), and
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* we will claim that sched_clock() is zero for a little while, until
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* we run setup_clock(), above.
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*/
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unsigned long long sched_clock(void)
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{
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return clocksource_cyc2ns(get_cycles(),
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sched_clock_mult, SCHED_CLOCK_SHIFT);
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}
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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/*
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* Use the tile timer to convert nsecs to core clock cycles, relying
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* on it having the same frequency as SPR_CYCLE.
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*/
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cycles_t ns2cycles(unsigned long nsecs)
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{
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/*
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* We do not have to disable preemption here as each core has the same
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* clock frequency.
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*/
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struct clock_event_device *dev = raw_cpu_ptr(&tile_timer);
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/*
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* as in clocksource.h and x86's timer.h, we split the calculation
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* into 2 parts to avoid unecessary overflow of the intermediate
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* value. This will not lead to any loss of precision.
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*/
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u64 quot = (u64)nsecs >> dev->shift;
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u64 rem = (u64)nsecs & ((1ULL << dev->shift) - 1);
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return quot * dev->mult + ((rem * dev->mult) >> dev->shift);
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}
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void update_vsyscall_tz(void)
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{
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write_seqcount_begin(&vdso_data->tz_seq);
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vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
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vdso_data->tz_dsttime = sys_tz.tz_dsttime;
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write_seqcount_end(&vdso_data->tz_seq);
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}
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void update_vsyscall(struct timekeeper *tk)
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{
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if (tk->tkr.clock != &cycle_counter_cs)
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return;
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write_seqcount_begin(&vdso_data->tb_seq);
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vdso_data->cycle_last = tk->tkr.cycle_last;
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vdso_data->mask = tk->tkr.mask;
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vdso_data->mult = tk->tkr.mult;
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vdso_data->shift = tk->tkr.shift;
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vdso_data->wall_time_sec = tk->xtime_sec;
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vdso_data->wall_time_snsec = tk->tkr.xtime_nsec;
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vdso_data->monotonic_time_sec = tk->xtime_sec
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+ tk->wall_to_monotonic.tv_sec;
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vdso_data->monotonic_time_snsec = tk->tkr.xtime_nsec
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+ ((u64)tk->wall_to_monotonic.tv_nsec
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<< tk->tkr.shift);
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while (vdso_data->monotonic_time_snsec >=
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(((u64)NSEC_PER_SEC) << tk->tkr.shift)) {
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vdso_data->monotonic_time_snsec -=
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((u64)NSEC_PER_SEC) << tk->tkr.shift;
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vdso_data->monotonic_time_sec++;
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}
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vdso_data->wall_time_coarse_sec = tk->xtime_sec;
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vdso_data->wall_time_coarse_nsec = (long)(tk->tkr.xtime_nsec >>
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tk->tkr.shift);
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vdso_data->monotonic_time_coarse_sec =
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vdso_data->wall_time_coarse_sec + tk->wall_to_monotonic.tv_sec;
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vdso_data->monotonic_time_coarse_nsec =
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vdso_data->wall_time_coarse_nsec + tk->wall_to_monotonic.tv_nsec;
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while (vdso_data->monotonic_time_coarse_nsec >= NSEC_PER_SEC) {
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vdso_data->monotonic_time_coarse_nsec -= NSEC_PER_SEC;
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vdso_data->monotonic_time_coarse_sec++;
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}
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write_seqcount_end(&vdso_data->tb_seq);
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}
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