493 lines
12 KiB
C
493 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Pinctrl driver for Rockchip RK805 PMIC
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*
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* Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Joseph Chen <chenjh@rock-chips.com>
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*
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* Based on the pinctrl-as3722 driver
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*/
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#include <linux/gpio/driver.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mfd/rk808.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pm.h>
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#include <linux/slab.h>
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#include "core.h"
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#include "pinconf.h"
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#include "pinctrl-utils.h"
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struct rk805_pin_function {
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const char *name;
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const char *const *groups;
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unsigned int ngroups;
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int mux_option;
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};
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struct rk805_pin_group {
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const char *name;
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const unsigned int pins[1];
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unsigned int npins;
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};
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/*
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* @reg: gpio setting register;
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* @fun_mask: functions select mask value, when set is gpio;
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* @dir_mask: input or output mask value, when set is output, otherwise input;
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* @val_mask: gpio set value, when set is level high, otherwise low;
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*
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* Different PMIC has different pin features, belowing 3 mask members are not
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* all necessary for every PMIC. For example, RK805 has 2 pins that can be used
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* as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
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* pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
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* necessary.
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*/
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struct rk805_pin_config {
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u8 reg;
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u8 fun_msk;
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u8 dir_msk;
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u8 val_msk;
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};
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struct rk805_pctrl_info {
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struct rk808 *rk808;
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct gpio_chip gpio_chip;
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struct pinctrl_desc pinctrl_desc;
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const struct rk805_pin_function *functions;
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unsigned int num_functions;
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const struct rk805_pin_group *groups;
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int num_pin_groups;
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const struct pinctrl_pin_desc *pins;
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unsigned int num_pins;
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struct rk805_pin_config *pin_cfg;
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};
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enum rk805_pinmux_option {
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RK805_PINMUX_GPIO,
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};
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enum {
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RK805_GPIO0,
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RK805_GPIO1,
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};
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static const char *const rk805_gpio_groups[] = {
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"gpio0",
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"gpio1",
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};
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/* RK805: 2 output only GPIOs */
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static const struct pinctrl_pin_desc rk805_pins_desc[] = {
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PINCTRL_PIN(RK805_GPIO0, "gpio0"),
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PINCTRL_PIN(RK805_GPIO1, "gpio1"),
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};
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static const struct rk805_pin_function rk805_pin_functions[] = {
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{
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.name = "gpio",
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.groups = rk805_gpio_groups,
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.ngroups = ARRAY_SIZE(rk805_gpio_groups),
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.mux_option = RK805_PINMUX_GPIO,
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},
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};
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static const struct rk805_pin_group rk805_pin_groups[] = {
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{
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.name = "gpio0",
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.pins = { RK805_GPIO0 },
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.npins = 1,
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},
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{
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.name = "gpio1",
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.pins = { RK805_GPIO1 },
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.npins = 1,
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},
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};
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#define RK805_GPIO0_VAL_MSK BIT(0)
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#define RK805_GPIO1_VAL_MSK BIT(1)
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static struct rk805_pin_config rk805_gpio_cfgs[] = {
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{
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.reg = RK805_OUT_REG,
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.val_msk = RK805_GPIO0_VAL_MSK,
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},
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{
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.reg = RK805_OUT_REG,
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.val_msk = RK805_GPIO1_VAL_MSK,
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},
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};
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/* generic gpio chip */
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static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
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int ret, val;
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ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
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if (ret) {
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dev_err(pci->dev, "get gpio%d value failed\n", offset);
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return ret;
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}
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return !!(val & pci->pin_cfg[offset].val_msk);
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}
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static void rk805_gpio_set(struct gpio_chip *chip,
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unsigned int offset,
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int value)
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{
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struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
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int ret;
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ret = regmap_update_bits(pci->rk808->regmap,
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pci->pin_cfg[offset].reg,
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pci->pin_cfg[offset].val_msk,
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value ? pci->pin_cfg[offset].val_msk : 0);
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if (ret)
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dev_err(pci->dev, "set gpio%d value %d failed\n",
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offset, value);
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}
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static int rk805_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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return pinctrl_gpio_direction_input(chip->base + offset);
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}
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static int rk805_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset, int value)
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{
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rk805_gpio_set(chip, offset, value);
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return pinctrl_gpio_direction_output(chip->base + offset);
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}
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static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
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{
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struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
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unsigned int val;
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int ret;
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/* default output*/
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if (!pci->pin_cfg[offset].dir_msk)
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return GPIO_LINE_DIRECTION_OUT;
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ret = regmap_read(pci->rk808->regmap,
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pci->pin_cfg[offset].reg,
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&val);
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if (ret) {
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dev_err(pci->dev, "get gpio%d direction failed\n", offset);
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return ret;
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}
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if (val & pci->pin_cfg[offset].dir_msk)
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return GPIO_LINE_DIRECTION_OUT;
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return GPIO_LINE_DIRECTION_IN;
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}
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static const struct gpio_chip rk805_gpio_chip = {
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.label = "rk805-gpio",
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.request = gpiochip_generic_request,
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.free = gpiochip_generic_free,
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.get_direction = rk805_gpio_get_direction,
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.get = rk805_gpio_get,
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.set = rk805_gpio_set,
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.direction_input = rk805_gpio_direction_input,
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.direction_output = rk805_gpio_direction_output,
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.can_sleep = true,
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.base = -1,
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.owner = THIS_MODULE,
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};
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/* generic pinctrl */
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static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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return pci->num_pin_groups;
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}
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static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int group)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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return pci->groups[group].name;
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}
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static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned int group,
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const unsigned int **pins,
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unsigned int *num_pins)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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*pins = pci->groups[group].pins;
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*num_pins = pci->groups[group].npins;
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return 0;
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}
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static const struct pinctrl_ops rk805_pinctrl_ops = {
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.get_groups_count = rk805_pinctrl_get_groups_count,
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.get_group_name = rk805_pinctrl_get_group_name,
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.get_group_pins = rk805_pinctrl_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.dt_free_map = pinctrl_utils_free_map,
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};
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static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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return pci->num_functions;
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}
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static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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unsigned int function)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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return pci->functions[function].name;
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}
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static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
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unsigned int function,
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const char *const **groups,
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unsigned int *const num_groups)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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*groups = pci->functions[function].groups;
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*num_groups = pci->functions[function].ngroups;
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return 0;
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}
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static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
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unsigned int offset,
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int mux)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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int ret;
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if (!pci->pin_cfg[offset].fun_msk)
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return 0;
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if (mux == RK805_PINMUX_GPIO) {
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ret = regmap_update_bits(pci->rk808->regmap,
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pci->pin_cfg[offset].reg,
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pci->pin_cfg[offset].fun_msk,
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pci->pin_cfg[offset].fun_msk);
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if (ret) {
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dev_err(pci->dev, "set gpio%d GPIO failed\n", offset);
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return ret;
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}
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} else {
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dev_err(pci->dev, "Couldn't find function mux %d\n", mux);
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return -EINVAL;
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}
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return 0;
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}
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static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
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unsigned int function,
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unsigned int group)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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int mux = pci->functions[function].mux_option;
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int offset = group;
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return _rk805_pinctrl_set_mux(pctldev, offset, mux);
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}
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static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int offset, bool input)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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int ret;
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/* switch to gpio function */
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ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
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if (ret) {
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dev_err(pci->dev, "set gpio%d mux failed\n", offset);
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return ret;
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}
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/* set direction */
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if (!pci->pin_cfg[offset].dir_msk)
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return 0;
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ret = regmap_update_bits(pci->rk808->regmap,
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pci->pin_cfg[offset].reg,
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pci->pin_cfg[offset].dir_msk,
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input ? 0 : pci->pin_cfg[offset].dir_msk);
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if (ret) {
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dev_err(pci->dev, "set gpio%d direction failed\n", offset);
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return ret;
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}
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return ret;
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}
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static const struct pinmux_ops rk805_pinmux_ops = {
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.get_functions_count = rk805_pinctrl_get_funcs_count,
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.get_function_name = rk805_pinctrl_get_func_name,
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.get_function_groups = rk805_pinctrl_get_func_groups,
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.set_mux = rk805_pinctrl_set_mux,
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.gpio_set_direction = rk805_pmx_gpio_set_direction,
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};
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static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *config)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param = pinconf_to_config_param(*config);
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u32 arg = 0;
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switch (param) {
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case PIN_CONFIG_OUTPUT:
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arg = rk805_gpio_get(&pci->gpio_chip, pin);
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break;
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default:
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dev_err(pci->dev, "Properties not supported\n");
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return -ENOTSUPP;
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}
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*config = pinconf_to_config_packed(param, (u16)arg);
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return 0;
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}
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static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
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unsigned int pin, unsigned long *configs,
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unsigned int num_configs)
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{
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struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param;
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u32 i, arg = 0;
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for (i = 0; i < num_configs; i++) {
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param = pinconf_to_config_param(configs[i]);
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arg = pinconf_to_config_argument(configs[i]);
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switch (param) {
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case PIN_CONFIG_OUTPUT:
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rk805_gpio_set(&pci->gpio_chip, pin, arg);
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rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
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break;
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default:
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dev_err(pci->dev, "Properties not supported\n");
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return -ENOTSUPP;
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}
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}
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return 0;
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}
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static const struct pinconf_ops rk805_pinconf_ops = {
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.pin_config_get = rk805_pinconf_get,
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.pin_config_set = rk805_pinconf_set,
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};
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static const struct pinctrl_desc rk805_pinctrl_desc = {
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.name = "rk805-pinctrl",
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.pctlops = &rk805_pinctrl_ops,
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.pmxops = &rk805_pinmux_ops,
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.confops = &rk805_pinconf_ops,
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.owner = THIS_MODULE,
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};
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static int rk805_pinctrl_probe(struct platform_device *pdev)
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{
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struct rk805_pctrl_info *pci;
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int ret;
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pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
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if (!pci)
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return -ENOMEM;
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pci->dev = &pdev->dev;
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pci->dev->of_node = pdev->dev.parent->of_node;
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pci->rk808 = dev_get_drvdata(pdev->dev.parent);
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pci->pinctrl_desc = rk805_pinctrl_desc;
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pci->gpio_chip = rk805_gpio_chip;
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pci->gpio_chip.parent = &pdev->dev;
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pci->gpio_chip.of_node = pdev->dev.parent->of_node;
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platform_set_drvdata(pdev, pci);
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switch (pci->rk808->variant) {
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case RK805_ID:
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pci->pins = rk805_pins_desc;
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pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
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pci->functions = rk805_pin_functions;
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pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
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pci->groups = rk805_pin_groups;
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pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
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pci->pinctrl_desc.pins = rk805_pins_desc;
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pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
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pci->pin_cfg = rk805_gpio_cfgs;
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pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
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break;
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default:
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dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
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pci->rk808->variant);
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return -EINVAL;
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}
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/* Add gpio chip */
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ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
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if (ret < 0) {
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dev_err(&pdev->dev, "Couldn't add gpiochip\n");
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return ret;
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}
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/* Add pinctrl */
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pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
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if (IS_ERR(pci->pctl)) {
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dev_err(&pdev->dev, "Couldn't add pinctrl\n");
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return PTR_ERR(pci->pctl);
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}
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/* Add pin range */
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ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
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0, 0, pci->gpio_chip.ngpio);
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if (ret < 0) {
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dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
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return ret;
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}
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return 0;
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}
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static struct platform_driver rk805_pinctrl_driver = {
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.probe = rk805_pinctrl_probe,
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.driver = {
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.name = "rk805-pinctrl",
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},
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};
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module_platform_driver(rk805_pinctrl_driver);
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MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
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MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
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MODULE_LICENSE("GPL v2");
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