537 lines
14 KiB
C
537 lines
14 KiB
C
/*
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* Linux Socket Filter - Kernel level socket filtering
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*
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* Based on the design of the Berkeley Packet Filter. The new
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* internal format has been designed by PLUMgrid:
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*
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* Copyright (c) 2011 - 2014 PLUMgrid, http://plumgrid.com
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*
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* Authors:
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*
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* Jay Schulist <jschlst@samba.org>
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* Alexei Starovoitov <ast@plumgrid.com>
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* Daniel Borkmann <dborkman@redhat.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Andi Kleen - Fix a few bad bugs and races.
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* Kris Katterjohn - Added many additional checks in sk_chk_filter()
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*/
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#include <linux/filter.h>
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#include <linux/skbuff.h>
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#include <asm/unaligned.h>
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/* Registers */
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#define BPF_R0 regs[BPF_REG_0]
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#define BPF_R1 regs[BPF_REG_1]
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#define BPF_R2 regs[BPF_REG_2]
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#define BPF_R3 regs[BPF_REG_3]
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#define BPF_R4 regs[BPF_REG_4]
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#define BPF_R5 regs[BPF_REG_5]
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#define BPF_R6 regs[BPF_REG_6]
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#define BPF_R7 regs[BPF_REG_7]
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#define BPF_R8 regs[BPF_REG_8]
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#define BPF_R9 regs[BPF_REG_9]
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#define BPF_R10 regs[BPF_REG_10]
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/* Named registers */
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#define DST regs[insn->dst_reg]
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#define SRC regs[insn->src_reg]
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#define FP regs[BPF_REG_FP]
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#define ARG1 regs[BPF_REG_ARG1]
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#define CTX regs[BPF_REG_CTX]
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#define IMM insn->imm
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/* No hurry in this branch
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*
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* Exported for the bpf jit load helper.
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*/
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void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb, int k, unsigned int size)
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{
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u8 *ptr = NULL;
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if (k >= SKF_NET_OFF)
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ptr = skb_network_header(skb) + k - SKF_NET_OFF;
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else if (k >= SKF_LL_OFF)
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ptr = skb_mac_header(skb) + k - SKF_LL_OFF;
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if (ptr >= skb->head && ptr + size <= skb_tail_pointer(skb))
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return ptr;
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return NULL;
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}
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/* Base function for offset calculation. Needs to go into .text section,
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* therefore keeping it non-static as well; will also be used by JITs
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* anyway later on, so do not let the compiler omit it.
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*/
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noinline u64 __bpf_call_base(u64 r1, u64 r2, u64 r3, u64 r4, u64 r5)
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{
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return 0;
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}
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/**
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* __sk_run_filter - run a filter on a given context
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* @ctx: buffer to run the filter on
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* @insn: filter to apply
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*
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* Decode and apply filter instructions to the skb->data. Return length to
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* keep, 0 for none. @ctx is the data we are operating on, @insn is the
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* array of filter instructions.
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*/
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static unsigned int __sk_run_filter(void *ctx, const struct bpf_insn *insn)
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{
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u64 stack[MAX_BPF_STACK / sizeof(u64)];
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u64 regs[MAX_BPF_REG], tmp;
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static const void *jumptable[256] = {
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[0 ... 255] = &&default_label,
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/* Now overwrite non-defaults ... */
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/* 32 bit ALU operations */
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[BPF_ALU | BPF_ADD | BPF_X] = &&ALU_ADD_X,
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[BPF_ALU | BPF_ADD | BPF_K] = &&ALU_ADD_K,
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[BPF_ALU | BPF_SUB | BPF_X] = &&ALU_SUB_X,
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[BPF_ALU | BPF_SUB | BPF_K] = &&ALU_SUB_K,
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[BPF_ALU | BPF_AND | BPF_X] = &&ALU_AND_X,
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[BPF_ALU | BPF_AND | BPF_K] = &&ALU_AND_K,
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[BPF_ALU | BPF_OR | BPF_X] = &&ALU_OR_X,
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[BPF_ALU | BPF_OR | BPF_K] = &&ALU_OR_K,
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[BPF_ALU | BPF_LSH | BPF_X] = &&ALU_LSH_X,
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[BPF_ALU | BPF_LSH | BPF_K] = &&ALU_LSH_K,
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[BPF_ALU | BPF_RSH | BPF_X] = &&ALU_RSH_X,
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[BPF_ALU | BPF_RSH | BPF_K] = &&ALU_RSH_K,
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[BPF_ALU | BPF_XOR | BPF_X] = &&ALU_XOR_X,
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[BPF_ALU | BPF_XOR | BPF_K] = &&ALU_XOR_K,
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[BPF_ALU | BPF_MUL | BPF_X] = &&ALU_MUL_X,
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[BPF_ALU | BPF_MUL | BPF_K] = &&ALU_MUL_K,
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[BPF_ALU | BPF_MOV | BPF_X] = &&ALU_MOV_X,
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[BPF_ALU | BPF_MOV | BPF_K] = &&ALU_MOV_K,
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[BPF_ALU | BPF_DIV | BPF_X] = &&ALU_DIV_X,
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[BPF_ALU | BPF_DIV | BPF_K] = &&ALU_DIV_K,
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[BPF_ALU | BPF_MOD | BPF_X] = &&ALU_MOD_X,
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[BPF_ALU | BPF_MOD | BPF_K] = &&ALU_MOD_K,
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[BPF_ALU | BPF_NEG] = &&ALU_NEG,
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[BPF_ALU | BPF_END | BPF_TO_BE] = &&ALU_END_TO_BE,
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[BPF_ALU | BPF_END | BPF_TO_LE] = &&ALU_END_TO_LE,
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/* 64 bit ALU operations */
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[BPF_ALU64 | BPF_ADD | BPF_X] = &&ALU64_ADD_X,
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[BPF_ALU64 | BPF_ADD | BPF_K] = &&ALU64_ADD_K,
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[BPF_ALU64 | BPF_SUB | BPF_X] = &&ALU64_SUB_X,
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[BPF_ALU64 | BPF_SUB | BPF_K] = &&ALU64_SUB_K,
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[BPF_ALU64 | BPF_AND | BPF_X] = &&ALU64_AND_X,
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[BPF_ALU64 | BPF_AND | BPF_K] = &&ALU64_AND_K,
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[BPF_ALU64 | BPF_OR | BPF_X] = &&ALU64_OR_X,
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[BPF_ALU64 | BPF_OR | BPF_K] = &&ALU64_OR_K,
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[BPF_ALU64 | BPF_LSH | BPF_X] = &&ALU64_LSH_X,
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[BPF_ALU64 | BPF_LSH | BPF_K] = &&ALU64_LSH_K,
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[BPF_ALU64 | BPF_RSH | BPF_X] = &&ALU64_RSH_X,
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[BPF_ALU64 | BPF_RSH | BPF_K] = &&ALU64_RSH_K,
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[BPF_ALU64 | BPF_XOR | BPF_X] = &&ALU64_XOR_X,
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[BPF_ALU64 | BPF_XOR | BPF_K] = &&ALU64_XOR_K,
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[BPF_ALU64 | BPF_MUL | BPF_X] = &&ALU64_MUL_X,
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[BPF_ALU64 | BPF_MUL | BPF_K] = &&ALU64_MUL_K,
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[BPF_ALU64 | BPF_MOV | BPF_X] = &&ALU64_MOV_X,
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[BPF_ALU64 | BPF_MOV | BPF_K] = &&ALU64_MOV_K,
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[BPF_ALU64 | BPF_ARSH | BPF_X] = &&ALU64_ARSH_X,
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[BPF_ALU64 | BPF_ARSH | BPF_K] = &&ALU64_ARSH_K,
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[BPF_ALU64 | BPF_DIV | BPF_X] = &&ALU64_DIV_X,
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[BPF_ALU64 | BPF_DIV | BPF_K] = &&ALU64_DIV_K,
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[BPF_ALU64 | BPF_MOD | BPF_X] = &&ALU64_MOD_X,
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[BPF_ALU64 | BPF_MOD | BPF_K] = &&ALU64_MOD_K,
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[BPF_ALU64 | BPF_NEG] = &&ALU64_NEG,
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/* Call instruction */
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[BPF_JMP | BPF_CALL] = &&JMP_CALL,
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/* Jumps */
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[BPF_JMP | BPF_JA] = &&JMP_JA,
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[BPF_JMP | BPF_JEQ | BPF_X] = &&JMP_JEQ_X,
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[BPF_JMP | BPF_JEQ | BPF_K] = &&JMP_JEQ_K,
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[BPF_JMP | BPF_JNE | BPF_X] = &&JMP_JNE_X,
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[BPF_JMP | BPF_JNE | BPF_K] = &&JMP_JNE_K,
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[BPF_JMP | BPF_JGT | BPF_X] = &&JMP_JGT_X,
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[BPF_JMP | BPF_JGT | BPF_K] = &&JMP_JGT_K,
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[BPF_JMP | BPF_JGE | BPF_X] = &&JMP_JGE_X,
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[BPF_JMP | BPF_JGE | BPF_K] = &&JMP_JGE_K,
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[BPF_JMP | BPF_JSGT | BPF_X] = &&JMP_JSGT_X,
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[BPF_JMP | BPF_JSGT | BPF_K] = &&JMP_JSGT_K,
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[BPF_JMP | BPF_JSGE | BPF_X] = &&JMP_JSGE_X,
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[BPF_JMP | BPF_JSGE | BPF_K] = &&JMP_JSGE_K,
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[BPF_JMP | BPF_JSET | BPF_X] = &&JMP_JSET_X,
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[BPF_JMP | BPF_JSET | BPF_K] = &&JMP_JSET_K,
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/* Program return */
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[BPF_JMP | BPF_EXIT] = &&JMP_EXIT,
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/* Store instructions */
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[BPF_STX | BPF_MEM | BPF_B] = &&STX_MEM_B,
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[BPF_STX | BPF_MEM | BPF_H] = &&STX_MEM_H,
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[BPF_STX | BPF_MEM | BPF_W] = &&STX_MEM_W,
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[BPF_STX | BPF_MEM | BPF_DW] = &&STX_MEM_DW,
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[BPF_STX | BPF_XADD | BPF_W] = &&STX_XADD_W,
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[BPF_STX | BPF_XADD | BPF_DW] = &&STX_XADD_DW,
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[BPF_ST | BPF_MEM | BPF_B] = &&ST_MEM_B,
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[BPF_ST | BPF_MEM | BPF_H] = &&ST_MEM_H,
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[BPF_ST | BPF_MEM | BPF_W] = &&ST_MEM_W,
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[BPF_ST | BPF_MEM | BPF_DW] = &&ST_MEM_DW,
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/* Load instructions */
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[BPF_LDX | BPF_MEM | BPF_B] = &&LDX_MEM_B,
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[BPF_LDX | BPF_MEM | BPF_H] = &&LDX_MEM_H,
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[BPF_LDX | BPF_MEM | BPF_W] = &&LDX_MEM_W,
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[BPF_LDX | BPF_MEM | BPF_DW] = &&LDX_MEM_DW,
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[BPF_LD | BPF_ABS | BPF_W] = &&LD_ABS_W,
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[BPF_LD | BPF_ABS | BPF_H] = &&LD_ABS_H,
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[BPF_LD | BPF_ABS | BPF_B] = &&LD_ABS_B,
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[BPF_LD | BPF_IND | BPF_W] = &&LD_IND_W,
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[BPF_LD | BPF_IND | BPF_H] = &&LD_IND_H,
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[BPF_LD | BPF_IND | BPF_B] = &&LD_IND_B,
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};
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void *ptr;
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int off;
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#define CONT ({ insn++; goto select_insn; })
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#define CONT_JMP ({ insn++; goto select_insn; })
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FP = (u64) (unsigned long) &stack[ARRAY_SIZE(stack)];
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ARG1 = (u64) (unsigned long) ctx;
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/* Registers used in classic BPF programs need to be reset first. */
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regs[BPF_REG_A] = 0;
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regs[BPF_REG_X] = 0;
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select_insn:
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goto *jumptable[insn->code];
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/* ALU */
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#define ALU(OPCODE, OP) \
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ALU64_##OPCODE##_X: \
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DST = DST OP SRC; \
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CONT; \
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ALU_##OPCODE##_X: \
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DST = (u32) DST OP (u32) SRC; \
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CONT; \
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ALU64_##OPCODE##_K: \
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DST = DST OP IMM; \
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CONT; \
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ALU_##OPCODE##_K: \
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DST = (u32) DST OP (u32) IMM; \
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CONT;
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ALU(ADD, +)
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ALU(SUB, -)
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ALU(AND, &)
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ALU(OR, |)
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ALU(LSH, <<)
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ALU(RSH, >>)
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ALU(XOR, ^)
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ALU(MUL, *)
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#undef ALU
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ALU_NEG:
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DST = (u32) -DST;
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CONT;
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ALU64_NEG:
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DST = -DST;
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CONT;
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ALU_MOV_X:
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DST = (u32) SRC;
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CONT;
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ALU_MOV_K:
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DST = (u32) IMM;
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CONT;
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ALU64_MOV_X:
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DST = SRC;
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CONT;
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ALU64_MOV_K:
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DST = IMM;
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CONT;
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ALU64_ARSH_X:
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(*(s64 *) &DST) >>= SRC;
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CONT;
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ALU64_ARSH_K:
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(*(s64 *) &DST) >>= IMM;
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CONT;
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ALU64_MOD_X:
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if (unlikely(SRC == 0))
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return 0;
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tmp = DST;
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DST = do_div(tmp, SRC);
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CONT;
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ALU_MOD_X:
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if (unlikely(SRC == 0))
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return 0;
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tmp = (u32) DST;
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DST = do_div(tmp, (u32) SRC);
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CONT;
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ALU64_MOD_K:
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tmp = DST;
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DST = do_div(tmp, IMM);
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CONT;
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ALU_MOD_K:
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tmp = (u32) DST;
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DST = do_div(tmp, (u32) IMM);
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CONT;
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ALU64_DIV_X:
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if (unlikely(SRC == 0))
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return 0;
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do_div(DST, SRC);
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CONT;
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ALU_DIV_X:
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if (unlikely(SRC == 0))
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return 0;
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tmp = (u32) DST;
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do_div(tmp, (u32) SRC);
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DST = (u32) tmp;
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CONT;
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ALU64_DIV_K:
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do_div(DST, IMM);
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CONT;
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ALU_DIV_K:
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tmp = (u32) DST;
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do_div(tmp, (u32) IMM);
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DST = (u32) tmp;
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CONT;
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ALU_END_TO_BE:
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switch (IMM) {
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case 16:
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DST = (__force u16) cpu_to_be16(DST);
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break;
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case 32:
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DST = (__force u32) cpu_to_be32(DST);
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break;
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case 64:
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DST = (__force u64) cpu_to_be64(DST);
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break;
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}
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CONT;
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ALU_END_TO_LE:
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switch (IMM) {
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case 16:
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DST = (__force u16) cpu_to_le16(DST);
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break;
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case 32:
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DST = (__force u32) cpu_to_le32(DST);
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break;
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case 64:
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DST = (__force u64) cpu_to_le64(DST);
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break;
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}
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CONT;
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/* CALL */
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JMP_CALL:
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/* Function call scratches BPF_R1-BPF_R5 registers,
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* preserves BPF_R6-BPF_R9, and stores return value
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* into BPF_R0.
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*/
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BPF_R0 = (__bpf_call_base + insn->imm)(BPF_R1, BPF_R2, BPF_R3,
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BPF_R4, BPF_R5);
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CONT;
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/* JMP */
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JMP_JA:
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insn += insn->off;
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CONT;
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JMP_JEQ_X:
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if (DST == SRC) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JEQ_K:
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if (DST == IMM) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JNE_X:
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if (DST != SRC) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JNE_K:
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if (DST != IMM) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JGT_X:
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if (DST > SRC) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JGT_K:
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if (DST > IMM) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JGE_X:
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if (DST >= SRC) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JGE_K:
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if (DST >= IMM) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JSGT_X:
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if (((s64) DST) > ((s64) SRC)) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JSGT_K:
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if (((s64) DST) > ((s64) IMM)) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JSGE_X:
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if (((s64) DST) >= ((s64) SRC)) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JSGE_K:
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if (((s64) DST) >= ((s64) IMM)) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JSET_X:
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if (DST & SRC) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_JSET_K:
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if (DST & IMM) {
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insn += insn->off;
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CONT_JMP;
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}
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CONT;
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JMP_EXIT:
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return BPF_R0;
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/* STX and ST and LDX*/
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#define LDST(SIZEOP, SIZE) \
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STX_MEM_##SIZEOP: \
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*(SIZE *)(unsigned long) (DST + insn->off) = SRC; \
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CONT; \
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ST_MEM_##SIZEOP: \
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*(SIZE *)(unsigned long) (DST + insn->off) = IMM; \
|
|
CONT; \
|
|
LDX_MEM_##SIZEOP: \
|
|
DST = *(SIZE *)(unsigned long) (SRC + insn->off); \
|
|
CONT;
|
|
|
|
LDST(B, u8)
|
|
LDST(H, u16)
|
|
LDST(W, u32)
|
|
LDST(DW, u64)
|
|
#undef LDST
|
|
STX_XADD_W: /* lock xadd *(u32 *)(dst_reg + off16) += src_reg */
|
|
atomic_add((u32) SRC, (atomic_t *)(unsigned long)
|
|
(DST + insn->off));
|
|
CONT;
|
|
STX_XADD_DW: /* lock xadd *(u64 *)(dst_reg + off16) += src_reg */
|
|
atomic64_add((u64) SRC, (atomic64_t *)(unsigned long)
|
|
(DST + insn->off));
|
|
CONT;
|
|
LD_ABS_W: /* BPF_R0 = ntohl(*(u32 *) (skb->data + imm32)) */
|
|
off = IMM;
|
|
load_word:
|
|
/* BPF_LD + BPD_ABS and BPF_LD + BPF_IND insns are
|
|
* only appearing in the programs where ctx ==
|
|
* skb. All programs keep 'ctx' in regs[BPF_REG_CTX]
|
|
* == BPF_R6, sk_convert_filter() saves it in BPF_R6,
|
|
* internal BPF verifier will check that BPF_R6 ==
|
|
* ctx.
|
|
*
|
|
* BPF_ABS and BPF_IND are wrappers of function calls,
|
|
* so they scratch BPF_R1-BPF_R5 registers, preserve
|
|
* BPF_R6-BPF_R9, and store return value into BPF_R0.
|
|
*
|
|
* Implicit input:
|
|
* ctx == skb == BPF_R6 == CTX
|
|
*
|
|
* Explicit input:
|
|
* SRC == any register
|
|
* IMM == 32-bit immediate
|
|
*
|
|
* Output:
|
|
* BPF_R0 - 8/16/32-bit skb data converted to cpu endianness
|
|
*/
|
|
|
|
ptr = bpf_load_pointer((struct sk_buff *) (unsigned long) CTX, off, 4, &tmp);
|
|
if (likely(ptr != NULL)) {
|
|
BPF_R0 = get_unaligned_be32(ptr);
|
|
CONT;
|
|
}
|
|
|
|
return 0;
|
|
LD_ABS_H: /* BPF_R0 = ntohs(*(u16 *) (skb->data + imm32)) */
|
|
off = IMM;
|
|
load_half:
|
|
ptr = bpf_load_pointer((struct sk_buff *) (unsigned long) CTX, off, 2, &tmp);
|
|
if (likely(ptr != NULL)) {
|
|
BPF_R0 = get_unaligned_be16(ptr);
|
|
CONT;
|
|
}
|
|
|
|
return 0;
|
|
LD_ABS_B: /* BPF_R0 = *(u8 *) (skb->data + imm32) */
|
|
off = IMM;
|
|
load_byte:
|
|
ptr = bpf_load_pointer((struct sk_buff *) (unsigned long) CTX, off, 1, &tmp);
|
|
if (likely(ptr != NULL)) {
|
|
BPF_R0 = *(u8 *)ptr;
|
|
CONT;
|
|
}
|
|
|
|
return 0;
|
|
LD_IND_W: /* BPF_R0 = ntohl(*(u32 *) (skb->data + src_reg + imm32)) */
|
|
off = IMM + SRC;
|
|
goto load_word;
|
|
LD_IND_H: /* BPF_R0 = ntohs(*(u16 *) (skb->data + src_reg + imm32)) */
|
|
off = IMM + SRC;
|
|
goto load_half;
|
|
LD_IND_B: /* BPF_R0 = *(u8 *) (skb->data + src_reg + imm32) */
|
|
off = IMM + SRC;
|
|
goto load_byte;
|
|
|
|
default_label:
|
|
/* If we ever reach this, we have a bug somewhere. */
|
|
WARN_RATELIMIT(1, "unknown opcode %02x\n", insn->code);
|
|
return 0;
|
|
}
|
|
|
|
void __weak bpf_int_jit_compile(struct sk_filter *prog)
|
|
{
|
|
}
|
|
|
|
/**
|
|
* sk_filter_select_runtime - select execution runtime for BPF program
|
|
* @fp: sk_filter populated with internal BPF program
|
|
*
|
|
* try to JIT internal BPF program, if JIT is not available select interpreter
|
|
* BPF program will be executed via SK_RUN_FILTER() macro
|
|
*/
|
|
void sk_filter_select_runtime(struct sk_filter *fp)
|
|
{
|
|
fp->bpf_func = (void *) __sk_run_filter;
|
|
|
|
/* Probe if internal BPF can be JITed */
|
|
bpf_int_jit_compile(fp);
|
|
}
|
|
EXPORT_SYMBOL_GPL(sk_filter_select_runtime);
|
|
|
|
/* free internal BPF program */
|
|
void sk_filter_free(struct sk_filter *fp)
|
|
{
|
|
bpf_jit_free(fp);
|
|
}
|
|
EXPORT_SYMBOL_GPL(sk_filter_free);
|