186 lines
6.1 KiB
C
186 lines
6.1 KiB
C
/*
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* Drivers for CSR SiRFprimaII onboard UARTs.
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*
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* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
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*
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* Licensed under GPLv2 or later.
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*/
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#include <linux/bitops.h>
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/* UART Register Offset Define */
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#define SIRFUART_LINE_CTRL 0x0040
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#define SIRFUART_TX_RX_EN 0x004c
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#define SIRFUART_DIVISOR 0x0050
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#define SIRFUART_INT_EN 0x0054
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#define SIRFUART_INT_STATUS 0x0058
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#define SIRFUART_TX_DMA_IO_CTRL 0x0100
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#define SIRFUART_TX_DMA_IO_LEN 0x0104
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#define SIRFUART_TX_FIFO_CTRL 0x0108
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#define SIRFUART_TX_FIFO_LEVEL_CHK 0x010C
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#define SIRFUART_TX_FIFO_OP 0x0110
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#define SIRFUART_TX_FIFO_STATUS 0x0114
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#define SIRFUART_TX_FIFO_DATA 0x0118
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#define SIRFUART_RX_DMA_IO_CTRL 0x0120
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#define SIRFUART_RX_DMA_IO_LEN 0x0124
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#define SIRFUART_RX_FIFO_CTRL 0x0128
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#define SIRFUART_RX_FIFO_LEVEL_CHK 0x012C
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#define SIRFUART_RX_FIFO_OP 0x0130
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#define SIRFUART_RX_FIFO_STATUS 0x0134
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#define SIRFUART_RX_FIFO_DATA 0x0138
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#define SIRFUART_AFC_CTRL 0x0140
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#define SIRFUART_SWH_DMA_IO 0x0148
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/* UART Line Control Register */
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#define SIRFUART_DATA_BIT_LEN_MASK 0x3
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#define SIRFUART_DATA_BIT_LEN_5 BIT(0)
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#define SIRFUART_DATA_BIT_LEN_6 1
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#define SIRFUART_DATA_BIT_LEN_7 2
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#define SIRFUART_DATA_BIT_LEN_8 3
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#define SIRFUART_STOP_BIT_LEN_1 0
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#define SIRFUART_STOP_BIT_LEN_2 BIT(2)
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#define SIRFUART_PARITY_EN BIT(3)
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#define SIRFUART_EVEN_BIT BIT(4)
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#define SIRFUART_STICK_BIT_MASK (7 << 3)
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#define SIRFUART_STICK_BIT_NONE (0 << 3)
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#define SIRFUART_STICK_BIT_EVEN BIT(3)
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#define SIRFUART_STICK_BIT_ODD (3 << 3)
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#define SIRFUART_STICK_BIT_MARK (5 << 3)
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#define SIRFUART_STICK_BIT_SPACE (7 << 3)
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#define SIRFUART_SET_BREAK BIT(6)
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#define SIRFUART_LOOP_BACK BIT(7)
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#define SIRFUART_PARITY_MASK (7 << 3)
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#define SIRFUART_DUMMY_READ BIT(16)
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#define SIRFSOC_UART_RX_TIMEOUT(br, to) (((br) * (((to) + 999) / 1000)) / 1000)
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#define SIRFUART_RECV_TIMEOUT_MASK (0xFFFF << 16)
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#define SIRFUART_RECV_TIMEOUT(x) (((x) & 0xFFFF) << 16)
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/* UART Auto Flow Control */
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#define SIRFUART_AFC_RX_THD_MASK 0x000000FF
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#define SIRFUART_AFC_RX_EN BIT(8)
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#define SIRFUART_AFC_TX_EN BIT(9)
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#define SIRFUART_CTS_CTRL BIT(10)
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#define SIRFUART_RTS_CTRL BIT(11)
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#define SIRFUART_CTS_IN_STATUS BIT(12)
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#define SIRFUART_RTS_OUT_STATUS BIT(13)
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/* UART Interrupt Enable Register */
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#define SIRFUART_RX_DONE_INT BIT(0)
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#define SIRFUART_TX_DONE_INT BIT(1)
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#define SIRFUART_RX_OFLOW_INT BIT(2)
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#define SIRFUART_TX_ALLOUT_INT BIT(3)
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#define SIRFUART_RX_IO_DMA_INT BIT(4)
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#define SIRFUART_TX_IO_DMA_INT BIT(5)
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#define SIRFUART_RXFIFO_FULL_INT BIT(6)
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#define SIRFUART_TXFIFO_EMPTY_INT BIT(7)
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#define SIRFUART_RXFIFO_THD_INT BIT(8)
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#define SIRFUART_TXFIFO_THD_INT BIT(9)
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#define SIRFUART_FRM_ERR_INT BIT(10)
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#define SIRFUART_RXD_BREAK_INT BIT(11)
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#define SIRFUART_RX_TIMEOUT_INT BIT(12)
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#define SIRFUART_PARITY_ERR_INT BIT(13)
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#define SIRFUART_CTS_INT_EN BIT(14)
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#define SIRFUART_RTS_INT_EN BIT(15)
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/* UART Interrupt Status Register */
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#define SIRFUART_RX_DONE BIT(0)
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#define SIRFUART_TX_DONE BIT(1)
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#define SIRFUART_RX_OFLOW BIT(2)
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#define SIRFUART_TX_ALL_EMPTY BIT(3)
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#define SIRFUART_DMA_IO_RX_DONE BIT(4)
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#define SIRFUART_DMA_IO_TX_DONE BIT(5)
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#define SIRFUART_RXFIFO_FULL BIT(6)
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#define SIRFUART_TXFIFO_EMPTY BIT(7)
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#define SIRFUART_RXFIFO_THD_REACH BIT(8)
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#define SIRFUART_TXFIFO_THD_REACH BIT(9)
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#define SIRFUART_FRM_ERR BIT(10)
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#define SIRFUART_RXD_BREAK BIT(11)
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#define SIRFUART_RX_TIMEOUT BIT(12)
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#define SIRFUART_PARITY_ERR BIT(13)
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#define SIRFUART_CTS_CHANGE BIT(14)
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#define SIRFUART_RTS_CHANGE BIT(15)
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#define SIRFUART_PLUG_IN BIT(16)
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#define SIRFUART_ERR_INT_STAT \
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(SIRFUART_RX_OFLOW | \
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SIRFUART_FRM_ERR | \
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SIRFUART_RXD_BREAK | \
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SIRFUART_PARITY_ERR)
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#define SIRFUART_ERR_INT_EN \
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(SIRFUART_RX_OFLOW_INT | \
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SIRFUART_FRM_ERR_INT | \
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SIRFUART_RXD_BREAK_INT | \
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SIRFUART_PARITY_ERR_INT)
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#define SIRFUART_TX_INT_EN SIRFUART_TXFIFO_EMPTY_INT
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#define SIRFUART_RX_IO_INT_EN \
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(SIRFUART_RX_TIMEOUT_INT | \
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SIRFUART_RXFIFO_THD_INT | \
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SIRFUART_RXFIFO_FULL_INT | \
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SIRFUART_ERR_INT_EN)
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/* UART FIFO Register */
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#define SIRFUART_TX_FIFO_STOP 0x0
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#define SIRFUART_TX_FIFO_RESET 0x1
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#define SIRFUART_TX_FIFO_START 0x2
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#define SIRFUART_RX_FIFO_STOP 0x0
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#define SIRFUART_RX_FIFO_RESET 0x1
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#define SIRFUART_RX_FIFO_START 0x2
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#define SIRFUART_TX_MODE_DMA 0
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#define SIRFUART_TX_MODE_IO 1
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#define SIRFUART_RX_MODE_DMA 0
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#define SIRFUART_RX_MODE_IO 1
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#define SIRFUART_RX_EN 0x1
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#define SIRFUART_TX_EN 0x2
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/* Generic Definitions */
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#define SIRFSOC_UART_NAME "ttySiRF"
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#define SIRFSOC_UART_MAJOR 0
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#define SIRFSOC_UART_MINOR 0
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#define SIRFUART_PORT_NAME "sirfsoc-uart"
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#define SIRFUART_MAP_SIZE 0x200
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#define SIRFSOC_UART_NR 3
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#define SIRFSOC_PORT_TYPE 0xa5
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/* Baud Rate Calculation */
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#define SIRF_MIN_SAMPLE_DIV 0xf
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#define SIRF_MAX_SAMPLE_DIV 0x3f
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#define SIRF_IOCLK_DIV_MAX 0xffff
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#define SIRF_SAMPLE_DIV_SHIFT 16
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#define SIRF_IOCLK_DIV_MASK 0xffff
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#define SIRF_SAMPLE_DIV_MASK 0x3f0000
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#define SIRF_BAUD_RATE_SUPPORT_NR 18
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/* For Fast Baud Rate Calculation */
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struct sirfsoc_baudrate_to_regv {
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unsigned int baud_rate;
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unsigned int reg_val;
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};
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struct sirfsoc_uart_port {
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unsigned char hw_flow_ctrl;
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unsigned char ms_enabled;
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struct uart_port port;
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struct pinctrl *p;
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};
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/* Hardware Flow Control */
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#define SIRFUART_AFC_CTRL_RX_THD 0x70
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/* Register Access Control */
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#define portaddr(port, reg) ((port)->membase + (reg))
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#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg)))
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#define rd_regl(port, reg) (__raw_readl(portaddr(port, reg)))
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#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
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#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
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/* UART Port Mask */
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#define SIRFUART_FIFOLEVEL_MASK(port) ((port->line == 1) ? (0x1f) : (0x7f))
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#define SIRFUART_FIFOFULL_MASK(port) ((port->line == 1) ? (0x20) : (0x80))
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#define SIRFUART_FIFOEMPTY_MASK(port) ((port->line == 1) ? (0x40) : (0x100))
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/* I/O Mode */
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#define SIRFSOC_UART_IO_RX_MAX_CNT 256
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#define SIRFSOC_UART_IO_TX_REASONABLE_CNT 6
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