150 lines
3.8 KiB
C
150 lines
3.8 KiB
C
/*
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* Rockchip eFuse Driver
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*
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* Copyright (c) 2015 Rockchip Electronics Co. Ltd.
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* Author: Caesar Wang <wxt@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#define EFUSE_A_SHIFT 6
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#define EFUSE_A_MASK 0x3ff
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#define EFUSE_PGENB BIT(3)
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#define EFUSE_LOAD BIT(2)
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#define EFUSE_STROBE BIT(1)
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#define EFUSE_CSB BIT(0)
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#define REG_EFUSE_CTRL 0x0000
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#define REG_EFUSE_DOUT 0x0004
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struct rockchip_efuse_chip {
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struct device *dev;
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void __iomem *base;
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struct clk *clk;
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};
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static int rockchip_efuse_read(void *context, unsigned int offset,
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void *val, size_t bytes)
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{
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struct rockchip_efuse_chip *efuse = context;
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u8 *buf = val;
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int ret;
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ret = clk_prepare_enable(efuse->clk);
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if (ret < 0) {
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dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
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return ret;
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}
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writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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while (bytes--) {
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writel(readl(efuse->base + REG_EFUSE_CTRL) &
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(~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
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efuse->base + REG_EFUSE_CTRL);
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writel(readl(efuse->base + REG_EFUSE_CTRL) |
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((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
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efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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writel(readl(efuse->base + REG_EFUSE_CTRL) |
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EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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*buf++ = readb(efuse->base + REG_EFUSE_DOUT);
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writel(readl(efuse->base + REG_EFUSE_CTRL) &
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(~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
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udelay(1);
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}
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/* Switch to standby mode */
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writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
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clk_disable_unprepare(efuse->clk);
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return 0;
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}
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static struct nvmem_config econfig = {
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.name = "rockchip-efuse",
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.owner = THIS_MODULE,
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.stride = 1,
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.word_size = 1,
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.read_only = true,
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};
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static const struct of_device_id rockchip_efuse_match[] = {
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{ .compatible = "rockchip,rockchip-efuse", },
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{ /* sentinel */},
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};
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MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
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static int rockchip_efuse_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct nvmem_device *nvmem;
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struct rockchip_efuse_chip *efuse;
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efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
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GFP_KERNEL);
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if (!efuse)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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efuse->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(efuse->base))
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return PTR_ERR(efuse->base);
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efuse->clk = devm_clk_get(&pdev->dev, "pclk_efuse");
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if (IS_ERR(efuse->clk))
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return PTR_ERR(efuse->clk);
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efuse->dev = &pdev->dev;
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econfig.size = resource_size(res);
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econfig.reg_read = rockchip_efuse_read;
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econfig.priv = efuse;
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econfig.dev = efuse->dev;
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nvmem = nvmem_register(&econfig);
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if (IS_ERR(nvmem))
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return PTR_ERR(nvmem);
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platform_set_drvdata(pdev, nvmem);
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return 0;
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}
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static int rockchip_efuse_remove(struct platform_device *pdev)
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{
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struct nvmem_device *nvmem = platform_get_drvdata(pdev);
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return nvmem_unregister(nvmem);
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}
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static struct platform_driver rockchip_efuse_driver = {
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.probe = rockchip_efuse_probe,
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.remove = rockchip_efuse_remove,
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.driver = {
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.name = "rockchip-efuse",
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.of_match_table = rockchip_efuse_match,
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},
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};
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module_platform_driver(rockchip_efuse_driver);
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MODULE_DESCRIPTION("rockchip_efuse driver");
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MODULE_LICENSE("GPL v2");
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