169 lines
4.9 KiB
C
169 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __TI_SYSC_DATA_H__
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#define __TI_SYSC_DATA_H__
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enum ti_sysc_module_type {
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TI_SYSC_OMAP2,
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TI_SYSC_OMAP2_TIMER,
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TI_SYSC_OMAP3_SHAM,
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TI_SYSC_OMAP3_AES,
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TI_SYSC_OMAP4,
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TI_SYSC_OMAP4_TIMER,
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TI_SYSC_OMAP4_SIMPLE,
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TI_SYSC_OMAP34XX_SR,
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TI_SYSC_OMAP36XX_SR,
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TI_SYSC_OMAP4_SR,
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TI_SYSC_OMAP4_MCASP,
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TI_SYSC_OMAP4_USB_HOST_FS,
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TI_SYSC_DRA7_MCAN,
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TI_SYSC_PRUSS,
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};
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struct ti_sysc_cookie {
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void *data;
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void *clkdm;
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};
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/**
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* struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
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* @midle_shift: Offset of the midle bit
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* @clkact_shift: Offset of the clockactivity bit
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* @sidle_shift: Offset of the sidle bit
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* @enwkup_shift: Offset of the enawakeup bit
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* @srst_shift: Offset of the softreset bit
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* @autoidle_shift: Offset of the autoidle bit
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* @dmadisable_shift: Offset of the dmadisable bit
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* @emufree_shift; Offset of the emufree bit
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*
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* Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
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* feature is not available.
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*/
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struct sysc_regbits {
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s8 midle_shift;
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s8 clkact_shift;
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s8 sidle_shift;
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s8 enwkup_shift;
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s8 srst_shift;
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s8 autoidle_shift;
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s8 dmadisable_shift;
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s8 emufree_shift;
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};
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#define SYSC_QUIRK_GPMC_DEBUG BIT(26)
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#define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25)
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#define SYSC_MODULE_QUIRK_PRUSS BIT(24)
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#define SYSC_MODULE_QUIRK_DSS_RESET BIT(23)
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#define SYSC_MODULE_QUIRK_RTC_UNLOCK BIT(22)
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#define SYSC_QUIRK_CLKDM_NOAUTO BIT(21)
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#define SYSC_QUIRK_FORCE_MSTANDBY BIT(20)
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#define SYSC_MODULE_QUIRK_AESS BIT(19)
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#define SYSC_MODULE_QUIRK_SGX BIT(18)
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#define SYSC_MODULE_QUIRK_HDQ1W BIT(17)
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#define SYSC_MODULE_QUIRK_I2C BIT(16)
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#define SYSC_MODULE_QUIRK_WDT BIT(15)
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#define SYSS_QUIRK_RESETDONE_INVERTED BIT(14)
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#define SYSC_QUIRK_SWSUP_MSTANDBY BIT(13)
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#define SYSC_QUIRK_SWSUP_SIDLE_ACT BIT(12)
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#define SYSC_QUIRK_SWSUP_SIDLE BIT(11)
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#define SYSC_QUIRK_EXT_OPT_CLOCK BIT(10)
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#define SYSC_QUIRK_LEGACY_IDLE BIT(9)
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#define SYSC_QUIRK_RESET_STATUS BIT(8)
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#define SYSC_QUIRK_NO_IDLE BIT(7)
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#define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6)
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#define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5)
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#define SYSC_QUIRK_OPT_CLKS_NEEDED BIT(4)
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#define SYSC_QUIRK_OPT_CLKS_IN_RESET BIT(3)
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#define SYSC_QUIRK_16BIT BIT(2)
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#define SYSC_QUIRK_UNCACHED BIT(1)
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#define SYSC_QUIRK_USE_CLOCKACT BIT(0)
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#define SYSC_NR_IDLEMODES 4
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/**
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* struct sysc_capabilities - capabilities for an interconnect target module
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* @type: sysc type identifier for the module
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* @sysc_mask: bitmask of supported SYSCONFIG register bits
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* @regbits: bitmask of SYSCONFIG register bits
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* @mod_quirks: bitmask of module specific quirks
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*/
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struct sysc_capabilities {
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const enum ti_sysc_module_type type;
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const u32 sysc_mask;
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const struct sysc_regbits *regbits;
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const u32 mod_quirks;
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};
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/**
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* struct sysc_config - configuration for an interconnect target module
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* @sysc_val: configured value for sysc register
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* @syss_mask: configured mask value for SYSSTATUS register
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* @midlemodes: bitmask of supported master idle modes
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* @sidlemodes: bitmask of supported slave idle modes
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* @srst_udelay: optional delay needed after OCP soft reset
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* @quirks: bitmask of enabled quirks
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*/
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struct sysc_config {
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u32 sysc_val;
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u32 syss_mask;
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u8 midlemodes;
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u8 sidlemodes;
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u8 srst_udelay;
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u32 quirks;
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};
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enum sysc_registers {
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SYSC_REVISION,
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SYSC_SYSCONFIG,
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SYSC_SYSSTATUS,
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SYSC_MAX_REGS,
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};
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/**
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* struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
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* @name: legacy "ti,hwmods" module name
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* @module_pa: physical address of the interconnect target module
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* @module_size: size of the interconnect target module
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* @offsets: array of register offsets as listed in enum sysc_registers
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* @nr_offsets: number of registers
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* @cap: interconnect target module capabilities
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* @cfg: interconnect target module configuration
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*
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* This data is enough to allocate a new struct omap_hwmod_class_sysconfig
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* based on device tree data parsed by ti-sysc driver.
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*/
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struct ti_sysc_module_data {
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const char *name;
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u64 module_pa;
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u32 module_size;
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int *offsets;
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int nr_offsets;
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const struct sysc_capabilities *cap;
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struct sysc_config *cfg;
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};
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struct device;
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struct clk;
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struct ti_sysc_platform_data {
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struct of_dev_auxdata *auxdata;
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bool (*soc_type_gp)(void);
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int (*init_clockdomain)(struct device *dev, struct clk *fck,
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struct clk *ick, struct ti_sysc_cookie *cookie);
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void (*clkdm_deny_idle)(struct device *dev,
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const struct ti_sysc_cookie *cookie);
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void (*clkdm_allow_idle)(struct device *dev,
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const struct ti_sysc_cookie *cookie);
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int (*init_module)(struct device *dev,
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const struct ti_sysc_module_data *data,
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struct ti_sysc_cookie *cookie);
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int (*enable_module)(struct device *dev,
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const struct ti_sysc_cookie *cookie);
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int (*idle_module)(struct device *dev,
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const struct ti_sysc_cookie *cookie);
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int (*shutdown_module)(struct device *dev,
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const struct ti_sysc_cookie *cookie);
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};
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#endif /* __TI_SYSC_DATA_H__ */
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