559 lines
15 KiB
C
559 lines
15 KiB
C
/*
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* i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
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* Copyright (C) 2004 Arcom Control Systems
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* Copyright (C) 2008 Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/errno.h>
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#include <linux/i2c.h>
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#include <linux/i2c-algo-pca.h>
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#define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
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printk(KERN_DEBUG fmt, ## args); } while (0)
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#define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
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printk(KERN_DEBUG fmt, ## args); } while (0)
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#define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
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printk(KERN_DEBUG fmt, ## args); } while (0)
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static int i2c_debug;
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#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
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#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
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#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
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#define pca_clock(adap) adap->i2c_clock
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#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
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#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
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#define pca_wait(adap) adap->wait_for_completion(adap->data)
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static void pca_reset(struct i2c_algo_pca_data *adap)
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{
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if (adap->chip == I2C_PCA_CHIP_9665) {
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/* Ignore the reset function from the module,
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* we can use the parallel bus reset.
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*/
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pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
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pca_outw(adap, I2C_PCA_IND, 0xA5);
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pca_outw(adap, I2C_PCA_IND, 0x5A);
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} else {
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adap->reset_chip(adap->data);
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}
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}
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/*
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* Generate a start condition on the i2c bus.
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*
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* returns after the start condition has occurred
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*/
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static int pca_start(struct i2c_algo_pca_data *adap)
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{
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int sta = pca_get_con(adap);
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DEB2("=== START\n");
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sta |= I2C_PCA_CON_STA;
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sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
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pca_set_con(adap, sta);
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return pca_wait(adap);
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}
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/*
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* Generate a repeated start condition on the i2c bus
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*
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* return after the repeated start condition has occurred
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*/
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static int pca_repeated_start(struct i2c_algo_pca_data *adap)
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{
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int sta = pca_get_con(adap);
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DEB2("=== REPEATED START\n");
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sta |= I2C_PCA_CON_STA;
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sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
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pca_set_con(adap, sta);
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return pca_wait(adap);
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}
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/*
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* Generate a stop condition on the i2c bus
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*
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* returns after the stop condition has been generated
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*
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* STOPs do not generate an interrupt or set the SI flag, since the
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* part returns the idle state (0xf8). Hence we don't need to
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* pca_wait here.
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*/
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static void pca_stop(struct i2c_algo_pca_data *adap)
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{
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int sta = pca_get_con(adap);
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DEB2("=== STOP\n");
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sta |= I2C_PCA_CON_STO;
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sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
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pca_set_con(adap, sta);
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}
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/*
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* Send the slave address and R/W bit
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*
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* returns after the address has been sent
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*/
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static int pca_address(struct i2c_algo_pca_data *adap,
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struct i2c_msg *msg)
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{
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int sta = pca_get_con(adap);
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int addr = i2c_8bit_addr_from_msg(msg);
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DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
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msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
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pca_outw(adap, I2C_PCA_DAT, addr);
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sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
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pca_set_con(adap, sta);
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return pca_wait(adap);
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}
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/*
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* Transmit a byte.
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*
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* Returns after the byte has been transmitted
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*/
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static int pca_tx_byte(struct i2c_algo_pca_data *adap,
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__u8 b)
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{
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int sta = pca_get_con(adap);
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DEB2("=== WRITE %#04x\n", b);
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pca_outw(adap, I2C_PCA_DAT, b);
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sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
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pca_set_con(adap, sta);
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return pca_wait(adap);
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}
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/*
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* Receive a byte
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*
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* returns immediately.
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*/
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static void pca_rx_byte(struct i2c_algo_pca_data *adap,
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__u8 *b, int ack)
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{
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*b = pca_inw(adap, I2C_PCA_DAT);
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DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
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}
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/*
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* Setup ACK or NACK for next received byte and wait for it to arrive.
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*
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* Returns after next byte has arrived.
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*/
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static int pca_rx_ack(struct i2c_algo_pca_data *adap,
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int ack)
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{
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int sta = pca_get_con(adap);
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sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
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if (ack)
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sta |= I2C_PCA_CON_AA;
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pca_set_con(adap, sta);
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return pca_wait(adap);
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}
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static int pca_xfer(struct i2c_adapter *i2c_adap,
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struct i2c_msg *msgs,
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int num)
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{
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struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
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struct i2c_msg *msg = NULL;
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int curmsg;
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int numbytes = 0;
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int state;
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int ret;
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int completed = 1;
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unsigned long timeout = jiffies + i2c_adap->timeout;
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while ((state = pca_status(adap)) != 0xf8) {
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if (time_before(jiffies, timeout)) {
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msleep(10);
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} else {
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dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
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"%#04x\n", state);
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return -EBUSY;
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}
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}
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DEB1("{{{ XFER %d messages\n", num);
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if (i2c_debug >= 2) {
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for (curmsg = 0; curmsg < num; curmsg++) {
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int addr, i;
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msg = &msgs[curmsg];
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addr = (0x7f & msg->addr) ;
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if (msg->flags & I2C_M_RD)
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printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
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curmsg, msg->len, addr, (addr << 1) | 1);
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else {
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printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
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curmsg, msg->len, addr, addr << 1,
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msg->len == 0 ? "" : ", ");
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for (i = 0; i < msg->len; i++)
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printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
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printk("]\n");
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}
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}
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}
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curmsg = 0;
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ret = -EIO;
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while (curmsg < num) {
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state = pca_status(adap);
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DEB3("STATE is 0x%02x\n", state);
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msg = &msgs[curmsg];
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switch (state) {
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case 0xf8: /* On reset or stop the bus is idle */
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completed = pca_start(adap);
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break;
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case 0x08: /* A START condition has been transmitted */
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case 0x10: /* A repeated start condition has been transmitted */
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completed = pca_address(adap, msg);
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break;
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case 0x18: /* SLA+W has been transmitted; ACK has been received */
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case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
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if (numbytes < msg->len) {
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completed = pca_tx_byte(adap,
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msg->buf[numbytes]);
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numbytes++;
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break;
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}
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curmsg++; numbytes = 0;
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if (curmsg == num)
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pca_stop(adap);
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else
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completed = pca_repeated_start(adap);
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break;
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case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
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DEB2("NOT ACK received after SLA+W\n");
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pca_stop(adap);
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ret = -ENXIO;
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goto out;
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case 0x40: /* SLA+R has been transmitted; ACK has been received */
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completed = pca_rx_ack(adap, msg->len > 1);
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break;
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case 0x50: /* Data bytes has been received; ACK has been returned */
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if (numbytes < msg->len) {
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pca_rx_byte(adap, &msg->buf[numbytes], 1);
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numbytes++;
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completed = pca_rx_ack(adap,
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numbytes < msg->len - 1);
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break;
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}
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curmsg++; numbytes = 0;
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if (curmsg == num)
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pca_stop(adap);
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else
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completed = pca_repeated_start(adap);
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break;
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case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
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DEB2("NOT ACK received after SLA+R\n");
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pca_stop(adap);
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ret = -ENXIO;
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goto out;
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case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
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DEB2("NOT ACK received after data byte\n");
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pca_stop(adap);
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goto out;
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case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
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DEB2("Arbitration lost\n");
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/*
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* The PCA9564 data sheet (2006-09-01) says "A
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* START condition will be transmitted when the
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* bus becomes free (STOP or SCL and SDA high)"
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* when the STA bit is set (p. 11).
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*
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* In case this won't work, try pca_reset()
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* instead.
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*/
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pca_start(adap);
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goto out;
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case 0x58: /* Data byte has been received; NOT ACK has been returned */
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if (numbytes == msg->len - 1) {
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pca_rx_byte(adap, &msg->buf[numbytes], 0);
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curmsg++; numbytes = 0;
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if (curmsg == num)
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pca_stop(adap);
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else
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completed = pca_repeated_start(adap);
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} else {
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DEB2("NOT ACK sent after data byte received. "
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"Not final byte. numbytes %d. len %d\n",
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numbytes, msg->len);
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pca_stop(adap);
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goto out;
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}
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break;
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case 0x70: /* Bus error - SDA stuck low */
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DEB2("BUS ERROR - SDA Stuck low\n");
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pca_reset(adap);
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goto out;
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case 0x90: /* Bus error - SCL stuck low */
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DEB2("BUS ERROR - SCL Stuck low\n");
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pca_reset(adap);
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goto out;
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case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
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DEB2("BUS ERROR - Illegal START or STOP\n");
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pca_reset(adap);
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goto out;
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default:
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dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
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break;
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}
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if (!completed)
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goto out;
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}
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ret = curmsg;
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out:
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DEB1("}}} transferred %d/%d messages. "
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"status is %#04x. control is %#04x\n",
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curmsg, num, pca_status(adap),
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pca_get_con(adap));
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return ret;
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}
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static u32 pca_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static const struct i2c_algorithm pca_algo = {
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.master_xfer = pca_xfer,
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.functionality = pca_func,
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};
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static unsigned int pca_probe_chip(struct i2c_adapter *adap)
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{
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struct i2c_algo_pca_data *pca_data = adap->algo_data;
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/* The trick here is to check if there is an indirect register
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* available. If there is one, we will read the value we first
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* wrote on I2C_PCA_IADR. Otherwise, we will read the last value
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* we wrote on I2C_PCA_ADR
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*/
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pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
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pca_outw(pca_data, I2C_PCA_IND, 0xAA);
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pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
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pca_outw(pca_data, I2C_PCA_IND, 0x00);
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pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
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if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
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printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
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pca_data->chip = I2C_PCA_CHIP_9665;
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} else {
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printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
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pca_data->chip = I2C_PCA_CHIP_9564;
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}
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return pca_data->chip;
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}
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static int pca_init(struct i2c_adapter *adap)
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{
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struct i2c_algo_pca_data *pca_data = adap->algo_data;
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adap->algo = &pca_algo;
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if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
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static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
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int clock;
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if (pca_data->i2c_clock > 7) {
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switch (pca_data->i2c_clock) {
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case 330000:
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pca_data->i2c_clock = I2C_PCA_CON_330kHz;
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break;
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case 288000:
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pca_data->i2c_clock = I2C_PCA_CON_288kHz;
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break;
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case 217000:
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pca_data->i2c_clock = I2C_PCA_CON_217kHz;
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break;
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case 146000:
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pca_data->i2c_clock = I2C_PCA_CON_146kHz;
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break;
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case 88000:
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pca_data->i2c_clock = I2C_PCA_CON_88kHz;
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break;
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case 59000:
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pca_data->i2c_clock = I2C_PCA_CON_59kHz;
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break;
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case 44000:
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pca_data->i2c_clock = I2C_PCA_CON_44kHz;
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break;
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case 36000:
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pca_data->i2c_clock = I2C_PCA_CON_36kHz;
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break;
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default:
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printk(KERN_WARNING
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"%s: Invalid I2C clock speed selected."
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" Using default 59kHz.\n", adap->name);
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pca_data->i2c_clock = I2C_PCA_CON_59kHz;
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}
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} else {
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printk(KERN_WARNING "%s: "
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"Choosing the clock frequency based on "
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"index is deprecated."
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" Use the nominal frequency.\n", adap->name);
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}
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pca_reset(pca_data);
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clock = pca_clock(pca_data);
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printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
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adap->name, freqs[clock]);
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pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
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} else {
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int clock;
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int mode;
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int tlow, thi;
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/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
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int min_tlow, min_thi;
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/* These values are the maximum raise and fall values allowed
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* by the I2C operation mode (Standard, Fast or Fast+)
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* They are used (added) below to calculate the clock dividers
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* of PCA9665. Note that they are slightly different of the
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* real maximum, to allow the change on mode exactly on the
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* maximum clock rate for each mode
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*/
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int raise_fall_time;
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if (pca_data->i2c_clock > 1265800) {
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printk(KERN_WARNING "%s: I2C clock speed too high."
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" Using 1265.8kHz.\n", adap->name);
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pca_data->i2c_clock = 1265800;
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}
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if (pca_data->i2c_clock < 60300) {
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printk(KERN_WARNING "%s: I2C clock speed too low."
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" Using 60.3kHz.\n", adap->name);
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pca_data->i2c_clock = 60300;
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}
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/* To avoid integer overflow, use clock/100 for calculations */
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clock = pca_clock(pca_data) / 100;
|
|
|
|
if (pca_data->i2c_clock > 1000000) {
|
|
mode = I2C_PCA_MODE_TURBO;
|
|
min_tlow = 14;
|
|
min_thi = 5;
|
|
raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
|
|
} else if (pca_data->i2c_clock > 400000) {
|
|
mode = I2C_PCA_MODE_FASTP;
|
|
min_tlow = 17;
|
|
min_thi = 9;
|
|
raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
|
|
} else if (pca_data->i2c_clock > 100000) {
|
|
mode = I2C_PCA_MODE_FAST;
|
|
min_tlow = 44;
|
|
min_thi = 20;
|
|
raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
|
|
} else {
|
|
mode = I2C_PCA_MODE_STD;
|
|
min_tlow = 157;
|
|
min_thi = 134;
|
|
raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
|
|
}
|
|
|
|
/* The minimum clock that respects the thi/tlow = 134/157 is
|
|
* 64800 Hz. Below that, we have to fix the tlow to 255 and
|
|
* calculate the thi factor.
|
|
*/
|
|
if (clock < 648) {
|
|
tlow = 255;
|
|
thi = 1000000 - clock * raise_fall_time;
|
|
thi /= (I2C_PCA_OSC_PER * clock) - tlow;
|
|
} else {
|
|
tlow = (1000000 - clock * raise_fall_time) * min_tlow;
|
|
tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
|
|
thi = tlow * min_thi / min_tlow;
|
|
}
|
|
|
|
pca_reset(pca_data);
|
|
|
|
printk(KERN_INFO
|
|
"%s: Clock frequency is %dHz\n", adap->name, clock * 100);
|
|
|
|
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
|
|
pca_outw(pca_data, I2C_PCA_IND, mode);
|
|
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
|
|
pca_outw(pca_data, I2C_PCA_IND, tlow);
|
|
pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
|
|
pca_outw(pca_data, I2C_PCA_IND, thi);
|
|
|
|
pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
|
|
}
|
|
udelay(500); /* 500 us for oscillator to stabilise */
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* registering functions to load algorithms at runtime
|
|
*/
|
|
int i2c_pca_add_bus(struct i2c_adapter *adap)
|
|
{
|
|
int rval;
|
|
|
|
rval = pca_init(adap);
|
|
if (rval)
|
|
return rval;
|
|
|
|
return i2c_add_adapter(adap);
|
|
}
|
|
EXPORT_SYMBOL(i2c_pca_add_bus);
|
|
|
|
int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
|
|
{
|
|
int rval;
|
|
|
|
rval = pca_init(adap);
|
|
if (rval)
|
|
return rval;
|
|
|
|
return i2c_add_numbered_adapter(adap);
|
|
}
|
|
EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
|
|
|
|
MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
|
|
"Wolfram Sang <w.sang@pengutronix.de>");
|
|
MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_param(i2c_debug, int, 0);
|