154 lines
3.5 KiB
ArmAsm
154 lines
3.5 KiB
ArmAsm
/*
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* arch/xtensa/lib/memset.S
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*
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* ANSI C standard library function memset
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* (Well, almost. .fixup code might return zero.)
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of
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* this archive for more details.
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*
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* Copyright (C) 2002 Tensilica Inc.
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*/
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#include <linux/linkage.h>
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#include <asm/asmmacro.h>
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#include <asm/core.h>
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/*
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* void *memset(void *dst, int c, size_t length)
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*
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* The algorithm is as follows:
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* Create a word with c in all byte positions
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* If the destination is aligned,
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* do 16B chucks with a loop, and then finish up with
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* 8B, 4B, 2B, and 1B stores conditional on the length.
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* If destination is unaligned, align it by conditionally
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* setting 1B and 2B and then go to aligned case.
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* This code tries to use fall-through branches for the common
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* case of an aligned destination (except for the branches to
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* the alignment labels).
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*/
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.text
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ENTRY(__memset)
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WEAK(memset)
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abi_entry_default
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# a2/ dst, a3/ c, a4/ length
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extui a3, a3, 0, 8 # mask to just 8 bits
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slli a7, a3, 8 # duplicate character in all bytes of word
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or a3, a3, a7 # ...
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slli a7, a3, 16 # ...
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or a3, a3, a7 # ...
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mov a5, a2 # copy dst so that a2 is return value
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movi a6, 3 # for alignment tests
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bany a2, a6, .Ldstunaligned # if dst is unaligned
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.L0: # return here from .Ldstunaligned when dst is aligned
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srli a7, a4, 4 # number of loop iterations with 16B
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# per iteration
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bnez a4, .Laligned
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abi_ret_default
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/*
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* Destination is word-aligned.
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*/
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# set 16 bytes per iteration for word-aligned dst
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.align 4 # 1 mod 4 alignment for LOOPNEZ
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.byte 0 # (0 mod 4 alignment for LBEG)
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.Laligned:
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#if XCHAL_HAVE_LOOPS
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loopnez a7, .Loop1done
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a7, .Loop1done
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slli a6, a7, 4
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add a6, a6, a5 # a6 = end of last 16B chunk
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop1:
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EX(10f) s32i a3, a5, 0
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EX(10f) s32i a3, a5, 4
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EX(10f) s32i a3, a5, 8
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EX(10f) s32i a3, a5, 12
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addi a5, a5, 16
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#if !XCHAL_HAVE_LOOPS
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blt a5, a6, .Loop1
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#endif /* !XCHAL_HAVE_LOOPS */
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.Loop1done:
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bbci.l a4, 3, .L2
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# set 8 bytes
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EX(10f) s32i a3, a5, 0
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EX(10f) s32i a3, a5, 4
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addi a5, a5, 8
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.L2:
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bbci.l a4, 2, .L3
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# set 4 bytes
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EX(10f) s32i a3, a5, 0
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addi a5, a5, 4
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.L3:
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bbci.l a4, 1, .L4
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# set 2 bytes
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EX(10f) s16i a3, a5, 0
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addi a5, a5, 2
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.L4:
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bbci.l a4, 0, .L5
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# set 1 byte
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EX(10f) s8i a3, a5, 0
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.L5:
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.Lret1:
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abi_ret_default
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/*
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* Destination is unaligned
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*/
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.Ldstunaligned:
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bltui a4, 8, .Lbyteset # do short copies byte by byte
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bbci.l a5, 0, .L20 # branch if dst alignment half-aligned
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# dst is only byte aligned
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# set 1 byte
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EX(10f) s8i a3, a5, 0
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addi a5, a5, 1
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addi a4, a4, -1
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# now retest if dst aligned
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bbci.l a5, 1, .L0 # if now aligned, return to main algorithm
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.L20:
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# dst half-aligned
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# set 2 bytes
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EX(10f) s16i a3, a5, 0
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addi a5, a5, 2
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addi a4, a4, -2
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j .L0 # dst is now aligned, return to main algorithm
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/*
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* Byte by byte set
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*/
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.align 4
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.byte 0 # 1 mod 4 alignment for LOOPNEZ
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# (0 mod 4 alignment for LBEG)
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.Lbyteset:
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#if XCHAL_HAVE_LOOPS
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loopnez a4, .Lbytesetdone
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#else /* !XCHAL_HAVE_LOOPS */
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beqz a4, .Lbytesetdone
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add a6, a5, a4 # a6 = ending address
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lbyteloop:
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EX(10f) s8i a3, a5, 0
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addi a5, a5, 1
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#if !XCHAL_HAVE_LOOPS
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blt a5, a6, .Lbyteloop
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lbytesetdone:
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abi_ret_default
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ENDPROC(__memset)
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.section .fixup, "ax"
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.align 4
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/* We return zero if a failure occurred. */
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10:
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movi a2, 0
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abi_ret_default
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