719 lines
15 KiB
C
719 lines
15 KiB
C
/*
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* For the Realtek RTL chip RTL2831U
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* Realtek Release Date: 2008-03-14, ver 080314
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* Realtek version RTL2831 Linux driver version 080314
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* ver 080314
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*
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* for linux kernel version 2.6.21.4 - 2.6.22-14
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* support MXL5005s and MT2060 tuners (support tuner auto-detecting)
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* support two IR types -- RC5 and NEC
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*
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* Known boards with Realtek RTL chip RTL2821U
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* Freecom USB stick 14aa:0160 (version 4)
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* Conceptronic CTVDIGRCU
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*
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* Copyright (c) 2008 Realtek
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* Copyright (c) 2008 Jan Hoogenraad, Barnaby Shearer, Andy Hasper
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* This code is placed under the terms of the GNU General Public License
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*
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* Released by Realtek under GPLv2.
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* Thanks to Realtek for a lot of support we received !
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*
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* Revision: 080314 - original version
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*/
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#ifndef __TUNER_MXL5005S_H
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#define __TUNER_MXL5005S_H
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// The following context is source code provided by MaxLinear.
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// MaxLinear source code - Common.h
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//#pragma once
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typedef unsigned char _u8; // At least 1 Byte
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typedef unsigned short _u16; // At least 2 Bytes
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typedef signed short _s16;
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typedef unsigned long _u32; // At least 4 Bytes
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typedef void * HANDLE; // Pointer to memory location
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#define TUNER_REGS_NUM 104
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#define INITCTRL_NUM 40
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#ifdef _MXL_PRODUCTION
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#define CHCTRL_NUM 39
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#else
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#define CHCTRL_NUM 36
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#endif
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#define MXLCTRL_NUM 189
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#define MASTER_CONTROL_ADDR 9
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// Enumeration of AGC Mode
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typedef enum
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{
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MXL_DUAL_AGC = 0 ,
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MXL_SINGLE_AGC
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} AGC_Mode ;
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//
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// Enumeration of Master Control Register State
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//
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typedef enum
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{
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MC_LOAD_START = 1 ,
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MC_POWER_DOWN ,
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MC_SYNTH_RESET ,
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MC_SEQ_OFF
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} Master_Control_State ;
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//
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// Enumeration of MXL5005 Tuner Mode
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//
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typedef enum
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{
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MXL_ANALOG_MODE = 0 ,
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MXL_DIGITAL_MODE
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} Tuner_Mode ;
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//
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// Enumeration of MXL5005 Tuner IF Mode
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//
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typedef enum
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{
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MXL_ZERO_IF = 0 ,
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MXL_LOW_IF
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} Tuner_IF_Mode ;
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//
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// Enumeration of MXL5005 Tuner Clock Out Mode
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//
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typedef enum
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{
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MXL_CLOCK_OUT_DISABLE = 0 ,
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MXL_CLOCK_OUT_ENABLE
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} Tuner_Clock_Out ;
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//
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// Enumeration of MXL5005 Tuner Div Out Mode
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//
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typedef enum
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{
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MXL_DIV_OUT_1 = 0 ,
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MXL_DIV_OUT_4
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} Tuner_Div_Out ;
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//
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// Enumeration of MXL5005 Tuner Pull-up Cap Select Mode
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//
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typedef enum
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{
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MXL_CAP_SEL_DISABLE = 0 ,
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MXL_CAP_SEL_ENABLE
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} Tuner_Cap_Select ;
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//
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// Enumeration of MXL5005 Tuner RSSI Mode
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//
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typedef enum
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{
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MXL_RSSI_DISABLE = 0 ,
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MXL_RSSI_ENABLE
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} Tuner_RSSI ;
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//
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// Enumeration of MXL5005 Tuner Modulation Type
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//
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typedef enum
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{
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MXL_DEFAULT_MODULATION = 0 ,
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MXL_DVBT,
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MXL_ATSC,
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MXL_QAM,
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MXL_ANALOG_CABLE,
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MXL_ANALOG_OTA
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} Tuner_Modu_Type ;
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//
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// Enumeration of MXL5005 Tuner Tracking Filter Type
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//
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typedef enum
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{
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MXL_TF_DEFAULT = 0 ,
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MXL_TF_OFF,
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MXL_TF_C,
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MXL_TF_C_H,
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MXL_TF_D,
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MXL_TF_D_L,
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MXL_TF_E,
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MXL_TF_F,
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MXL_TF_E_2,
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MXL_TF_E_NA,
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MXL_TF_G
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} Tuner_TF_Type ;
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//
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// MXL5005 Tuner Register Struct
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//
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typedef struct _TunerReg_struct
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{
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_u16 Reg_Num ; // Tuner Register Address
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_u16 Reg_Val ; // Current sofware programmed value waiting to be writen
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} TunerReg_struct ;
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//
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// MXL5005 Tuner Control Struct
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//
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typedef struct _TunerControl_struct {
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_u16 Ctrl_Num ; // Control Number
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_u16 size ; // Number of bits to represent Value
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_u16 addr[25] ; // Array of Tuner Register Address for each bit position
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_u16 bit[25] ; // Array of bit position in Register Address for each bit position
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_u16 val[25] ; // Binary representation of Value
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} TunerControl_struct ;
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//
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// MXL5005 Tuner Struct
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//
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typedef struct _Tuner_struct
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{
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_u8 Mode ; // 0: Analog Mode ; 1: Digital Mode
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_u8 IF_Mode ; // for Analog Mode, 0: zero IF; 1: low IF
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_u32 Chan_Bandwidth ; // filter channel bandwidth (6, 7, 8)
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_u32 IF_OUT ; // Desired IF Out Frequency
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_u16 IF_OUT_LOAD ; // IF Out Load Resistor (200/300 Ohms)
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_u32 RF_IN ; // RF Input Frequency
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_u32 Fxtal ; // XTAL Frequency
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_u8 AGC_Mode ; // AGC Mode 0: Dual AGC; 1: Single AGC
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_u16 TOP ; // Value: take over point
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_u8 CLOCK_OUT ; // 0: turn off clock out; 1: turn on clock out
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_u8 DIV_OUT ; // 4MHz or 16MHz
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_u8 CAPSELECT ; // 0: disable On-Chip pulling cap; 1: enable
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_u8 EN_RSSI ; // 0: disable RSSI; 1: enable RSSI
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_u8 Mod_Type ; // Modulation Type;
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// 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable
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_u8 TF_Type ; // Tracking Filter Type
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// 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H
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// Calculated Settings
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_u32 RF_LO ; // Synth RF LO Frequency
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_u32 IF_LO ; // Synth IF LO Frequency
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_u32 TG_LO ; // Synth TG_LO Frequency
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// Pointers to ControlName Arrays
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_u16 Init_Ctrl_Num ; // Number of INIT Control Names
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TunerControl_struct Init_Ctrl[INITCTRL_NUM] ; // INIT Control Names Array Pointer
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_u16 CH_Ctrl_Num ; // Number of CH Control Names
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TunerControl_struct CH_Ctrl[CHCTRL_NUM] ; // CH Control Name Array Pointer
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_u16 MXL_Ctrl_Num ; // Number of MXL Control Names
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TunerControl_struct MXL_Ctrl[MXLCTRL_NUM] ; // MXL Control Name Array Pointer
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// Pointer to Tuner Register Array
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_u16 TunerRegs_Num ; // Number of Tuner Registers
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TunerReg_struct TunerRegs[TUNER_REGS_NUM] ; // Tuner Register Array Pointer
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} Tuner_struct ;
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typedef enum
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{
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//
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// Initialization Control Names
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//
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DN_IQTN_AMP_CUT = 1 , // 1
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BB_MODE , // 2
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BB_BUF , // 3
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BB_BUF_OA , // 4
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BB_ALPF_BANDSELECT , // 5
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BB_IQSWAP , // 6
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BB_DLPF_BANDSEL , // 7
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RFSYN_CHP_GAIN , // 8
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RFSYN_EN_CHP_HIGAIN , // 9
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AGC_IF , // 10
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AGC_RF , // 11
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IF_DIVVAL , // 12
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IF_VCO_BIAS , // 13
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CHCAL_INT_MOD_IF , // 14
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CHCAL_FRAC_MOD_IF , // 15
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DRV_RES_SEL , // 16
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I_DRIVER , // 17
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EN_AAF , // 18
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EN_3P , // 19
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EN_AUX_3P , // 20
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SEL_AAF_BAND , // 21
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SEQ_ENCLK16_CLK_OUT , // 22
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SEQ_SEL4_16B , // 23
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XTAL_CAPSELECT , // 24
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IF_SEL_DBL , // 25
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RFSYN_R_DIV , // 26
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SEQ_EXTSYNTHCALIF , // 27
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SEQ_EXTDCCAL , // 28
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AGC_EN_RSSI , // 29
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RFA_ENCLKRFAGC , // 30
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RFA_RSSI_REFH , // 31
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RFA_RSSI_REF , // 32
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RFA_RSSI_REFL , // 33
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RFA_FLR , // 34
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RFA_CEIL , // 35
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SEQ_EXTIQFSMPULSE , // 36
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OVERRIDE_1 , // 37
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BB_INITSTATE_DLPF_TUNE, // 38
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TG_R_DIV, // 39
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EN_CHP_LIN_B , // 40
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//
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// Channel Change Control Names
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//
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DN_POLY = 51 , // 51
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DN_RFGAIN , // 52
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DN_CAP_RFLPF , // 53
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DN_EN_VHFUHFBAR , // 54
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DN_GAIN_ADJUST , // 55
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DN_IQTNBUF_AMP , // 56
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DN_IQTNGNBFBIAS_BST , // 57
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RFSYN_EN_OUTMUX , // 58
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RFSYN_SEL_VCO_OUT , // 59
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RFSYN_SEL_VCO_HI , // 60
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RFSYN_SEL_DIVM , // 61
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RFSYN_RF_DIV_BIAS , // 62
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DN_SEL_FREQ , // 63
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RFSYN_VCO_BIAS , // 64
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CHCAL_INT_MOD_RF , // 65
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CHCAL_FRAC_MOD_RF , // 66
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RFSYN_LPF_R , // 67
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CHCAL_EN_INT_RF , // 68
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TG_LO_DIVVAL , // 69
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TG_LO_SELVAL , // 70
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TG_DIV_VAL , // 71
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TG_VCO_BIAS , // 72
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SEQ_EXTPOWERUP , // 73
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OVERRIDE_2 , // 74
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OVERRIDE_3 , // 75
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OVERRIDE_4 , // 76
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SEQ_FSM_PULSE , // 77
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GPIO_4B, // 78
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GPIO_3B, // 79
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GPIO_4, // 80
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GPIO_3, // 81
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GPIO_1B, // 82
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DAC_A_ENABLE , // 83
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DAC_B_ENABLE , // 84
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DAC_DIN_A , // 85
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DAC_DIN_B , // 86
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#ifdef _MXL_PRODUCTION
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RFSYN_EN_DIV, // 87
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RFSYN_DIVM, // 88
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DN_BYPASS_AGC_I2C // 89
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#endif
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} MXL5005_ControlName ;
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// MaxLinear source code - MXL5005_c.h
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// MXL5005.h : main header file for the MXL5005 DLL
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//
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//#pragma once
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//#include "Common.h"
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#ifdef _MXL_INTERNAL
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#include "Common_MXL.h"
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#endif
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void InitTunerControls( Tuner_struct *Tuner) ;
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_u16 MXL_BlockInit( Tuner_struct *Tuner ) ;
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_u16 MXL5005_RegisterInit (Tuner_struct * Tuner) ;
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_u16 MXL5005_ControlInit (Tuner_struct *Tuner) ;
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#ifdef _MXL_INTERNAL
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_u16 MXL5005_MXLControlInit(Tuner_struct *Tuner) ;
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#endif
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_u16 MXL5005_TunerConfig(Tuner_struct *Tuner,
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_u8 Mode, // 0: Analog Mode ; 1: Digital Mode
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_u8 IF_mode, // for Analog Mode, 0: zero IF; 1: low IF
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_u32 Bandwidth, // filter channel bandwidth (6, 7, 8)
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_u32 IF_out, // Desired IF Out Frequency
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_u32 Fxtal, // XTAL Frequency
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_u8 AGC_Mode, // AGC Mode - Dual AGC: 0, Single AGC: 1
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_u16 TOP, // 0: Dual AGC; Value: take over point
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_u16 IF_OUT_LOAD,// IF Out Load Resistor (200 / 300 Ohms)
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_u8 CLOCK_OUT, // 0: turn off clock out; 1: turn on clock out
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_u8 DIV_OUT, // 4MHz or 16MHz
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_u8 CAPSELECT, // 0: disable On-Chip pulling cap; 1: enable
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_u8 EN_RSSI, // 0: disable RSSI; 1: enable RSSI
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_u8 Mod_Type, // Modulation Type;
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// 0 - Default; 1 - DVB-T; 2 - ATSC; 3 - QAM; 4 - Analog Cable
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_u8 TF_Type // Tracking Filter Type
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// 0 - Default; 1 - Off; 2 - Type C; 3 - Type C-H
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) ;
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void MXL_SynthIFLO_Calc(Tuner_struct *Tuner) ;
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void MXL_SynthRFTGLO_Calc(Tuner_struct *Tuner) ;
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_u16 MXL_RegWrite(Tuner_struct *Tuner, _u8 RegNum, _u8 RegVal) ;
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_u16 MXL_RegRead(Tuner_struct *Tuner, _u8 RegNum, _u8 *RegVal) ;
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_u16 MXL_ControlWrite(Tuner_struct *Tuner, _u16 ControlNum, _u32 value) ;
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_u16 MXL_ControlWrite_Group(Tuner_struct *Tuner, _u16 ControlNum, _u32 value, _u16 controlGroup) ;
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_u16 MXL_ControlRead(Tuner_struct *Tuner, _u16 ControlNum, _u32 * value) ;
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_u16 MXL_ControlRegRead(Tuner_struct *Tuner, _u16 ControlNum, _u8 *RegNum, int * count) ;
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void MXL_RegWriteBit(Tuner_struct *Tuner, _u8 address, _u8 bit, _u8 bitVal);
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_u16 MXL_IFSynthInit( Tuner_struct * Tuner ) ;
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_u16 MXL_TuneRF(Tuner_struct *Tuner, _u32 RF_Freq) ;
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_u16 MXL_OverwriteICDefault( Tuner_struct *Tuner) ;
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_u16 MXL_SetGPIO(Tuner_struct *Tuner, _u8 GPIO_Num, _u8 GPIO_Val) ;
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_u32 MXL_Ceiling( _u32 value, _u32 resolution ) ;
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_u32 MXL_GetXtalInt(_u32 Xtal_Freq) ;
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_u16 MXL_GetInitRegister(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ;
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_u16 MXL_GetCHRegister(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ;
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_u16 MXL_GetCHRegister_ZeroIF(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ;
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_u16 MXL_GetCHRegister_LowIF(Tuner_struct *Tuner, _u8 * RegNum, _u8 *RegVal, int *count) ;
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_u16 MXL_GetMasterControl(_u8 *MasterReg, int state) ;
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#ifdef _MXL_PRODUCTION
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_u16 MXL_VCORange_Test(Tuner_struct *Tuner, int VCO_Range) ;
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_u16 MXL_Hystersis_Test(Tuner_struct *Tuner, int Hystersis) ;
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#endif
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// The following context is MxL5005S tuner API source code
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/**
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@file
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@brief MxL5005S tuner module declaration
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One can manipulate MxL5005S tuner through MxL5005S module.
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MxL5005S module is derived from tuner module.
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*/
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#include "tuner_base.h"
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// Definitions
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// Constants
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#define MXL5005S_REG_WRITING_TABLE_LEN_MAX 104
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#define MXL5005S_LATCH_BYTE 0xfe
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// Register address, MSB, and LSB
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#define MXL5005S_BB_IQSWAP_ADDR 59
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#define MXL5005S_BB_IQSWAP_MSB 0
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#define MXL5005S_BB_IQSWAP_LSB 0
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#define MXL5005S_BB_DLPF_BANDSEL_ADDR 53
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#define MXL5005S_BB_DLPF_BANDSEL_MSB 4
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#define MXL5005S_BB_DLPF_BANDSEL_LSB 3
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// Standard modes
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enum
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{
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MXL5005S_STANDARD_DVBT,
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MXL5005S_STANDARD_ATSC,
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};
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#define MXL5005S_STANDARD_MODE_NUM 2
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// Bandwidth modes
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enum
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{
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MXL5005S_BANDWIDTH_6MHZ = 6000000,
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MXL5005S_BANDWIDTH_7MHZ = 7000000,
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MXL5005S_BANDWIDTH_8MHZ = 8000000,
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};
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#define MXL5005S_BANDWIDTH_MODE_NUM 3
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// Top modes
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enum
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{
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MXL5005S_TOP_5P5 = 55,
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MXL5005S_TOP_7P2 = 72,
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MXL5005S_TOP_9P2 = 92,
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MXL5005S_TOP_11P0 = 110,
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MXL5005S_TOP_12P9 = 129,
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MXL5005S_TOP_14P7 = 147,
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MXL5005S_TOP_16P8 = 168,
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MXL5005S_TOP_19P4 = 194,
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MXL5005S_TOP_21P2 = 212,
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MXL5005S_TOP_23P2 = 232,
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MXL5005S_TOP_25P2 = 252,
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MXL5005S_TOP_27P1 = 271,
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MXL5005S_TOP_29P2 = 292,
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MXL5005S_TOP_31P7 = 317,
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MXL5005S_TOP_34P9 = 349,
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};
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// IF output load
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enum
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{
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MXL5005S_IF_OUTPUT_LOAD_200_OHM = 200,
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MXL5005S_IF_OUTPUT_LOAD_300_OHM = 300,
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};
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/// MxL5005S extra module alias
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typedef struct MXL5005S_EXTRA_MODULE_TAG MXL5005S_EXTRA_MODULE;
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// MxL5005S register setting function pointer
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typedef int
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(*MXL5005S_FP_SET_REGS_WITH_TABLE)(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned char *pAddrTable,
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unsigned char *pByteTable,
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int TableLen
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);
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// MxL5005S register mask bits setting function pointer
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typedef int
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(*MXL5005S_FP_SET_REG_MASK_BITS)(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned char RegAddr,
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unsigned char Msb,
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unsigned char Lsb,
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const unsigned char WritingValue
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);
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// MxL5005S spectrum mode setting function pointer
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typedef int
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(*MXL5005S_FP_SET_SPECTRUM_MODE)(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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int SpectrumMode
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);
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// MxL5005S bandwidth setting function pointer
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typedef int
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(*MXL5005S_FP_SET_BANDWIDTH_HZ)(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned long BandwidthHz
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);
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// MxL5005S extra module
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struct MXL5005S_EXTRA_MODULE_TAG
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{
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// MxL5005S function pointers
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MXL5005S_FP_SET_REGS_WITH_TABLE SetRegsWithTable;
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MXL5005S_FP_SET_REG_MASK_BITS SetRegMaskBits;
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MXL5005S_FP_SET_SPECTRUM_MODE SetSpectrumMode;
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MXL5005S_FP_SET_BANDWIDTH_HZ SetBandwidthHz;
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// MxL5005S extra data
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unsigned char AgcMasterByte; // Variable name in MaxLinear source code: AGC_MASTER_BYTE
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// MaxLinear defined struct
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Tuner_struct MxlDefinedTunerStructure;
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};
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// Builder
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void
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BuildMxl5005sModule(
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TUNER_MODULE **ppTuner,
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TUNER_MODULE *pTunerModuleMemory,
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MXL5005S_EXTRA_MODULE *pMxl5005sExtraModuleMemory,
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BASE_INTERFACE_MODULE *pBaseInterfaceModuleMemory,
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I2C_BRIDGE_MODULE *pI2cBridgeModuleMemory,
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unsigned char DeviceAddr,
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int StandardMode
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);
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// Manipulaing functions
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void
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mxl5005s_SetDeviceAddr(
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TUNER_MODULE *pTuner,
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unsigned char DeviceAddr
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);
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void
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mxl5005s_GetTunerType(
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TUNER_MODULE *pTuner,
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int *pTunerType
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);
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int
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mxl5005s_GetDeviceAddr(
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TUNER_MODULE *pTuner,
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unsigned char *pDeviceAddr
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);
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int
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mxl5005s_Initialize(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner
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);
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int
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mxl5005s_SetRfFreqHz(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned long RfFreqHz
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);
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int
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mxl5005s_GetRfFreqHz(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned long *pRfFreqHz
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);
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// Extra manipulaing functions
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int
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mxl5005s_SetRegsWithTable(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned char *pAddrTable,
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unsigned char *pByteTable,
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int TableLen
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);
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int
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mxl5005s_SetRegMaskBits(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned char RegAddr,
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unsigned char Msb,
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unsigned char Lsb,
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const unsigned char WritingValue
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);
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int
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mxl5005s_SetSpectrumMode(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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int SpectrumMode
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);
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int
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mxl5005s_SetBandwidthHz(
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struct dvb_usb_device* dib,
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TUNER_MODULE *pTuner,
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unsigned long BandwidthHz
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);
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// I2C birdge module demod argument setting
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void
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mxl5005s_SetI2cBridgeModuleTunerArg(
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TUNER_MODULE *pTuner
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);
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#endif
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