Stefan Roese e278fc71b2 mtd: fsmc_nand: Add BCH4 SW ECC support for SPEAr600 ... This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can be used by boards equipped with a NAND chip that requires 4-bit ECC strength. The SPEAr600 HW ECC only supports 1-bit ECC strength. To enable SW BCH4, you need to specify this in your nand controller DT node: nand-ecc-mode = "soft_bch"; nand-ecc-strength = <4>; nand-ecc-step-size = <512>; Tested on a custom SPEAr600 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> [Brian: tweaked the comments a bit] Signed-off-by: Brian Norris <computersforpeace@gmail.com>		2015-10-26 13:19:40 -07:00
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bindings	mtd: fsmc_nand: Add BCH4 SW ECC support for SPEAr600	2015-10-26 13:19:40 -07:00
00-INDEX	…
booting-without-of.txt	ARM: 8354/1: Documentation: devicetree: root node serial-number property documentation	2015-05-08 10:42:34 +01:00
changesets.txt	of: Transactional DT support.	2014-07-23 17:29:15 -06:00
dynamic-resolution-notes.txt	of: Introduce Device Tree resolve support.	2014-10-04 21:24:26 +01:00
of_unittest.txt	Documentation: rename of_selftest.txt to of_unittest.txt	2015-03-25 00:50:53 -05:00
overlay-notes.txt	Documentation: devicetree: Fix double words in Doumentation/devicetree	2015-01-28 15:13:11 -07:00
todo.txt	of: Eliminate of_allnodes list	2014-11-04 13:29:38 +00:00
usage-model.txt	…