Andy Shevchenko 6bea0f6d1c dmaengine: dw: properly read DWC_PARAMS register ... In case we have less than maximum allowed channels (8) and autoconfiguration is enabled the DWC_PARAMS read is wrong because it uses different arithmetic to what is needed for channel priority setup. Re-do the caclulations properly. This now works on AVR32 board well. Fixes: fed2574b3c (dw_dmac: introduce software emulation of LLP transfers) Cc: yitian.bu@tangramtek.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2015-09-30 13:42:02 +05:30
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Kconfig	dmaengine: sort the dw Kconfig	2015-08-24 13:58:18 +05:30
Makefile	dma: dw: add PCI part of the driver	2013-07-05 11:40:45 +05:30
core.c	dmaengine: dw: properly read DWC_PARAMS register	2015-09-30 13:42:02 +05:30
internal.h	dmaengine: dw: export probe()/remove() and Co to users	2014-10-15 20:31:05 +05:30
pci.c	dmaengine: dw: always export dw_dma_{en,dis}able	2014-10-15 20:31:04 +05:30
platform.c	dmaengine: dw: append MODULE_ALIAS for platform driver	2015-03-16 22:07:03 +05:30
regs.h	dmaengine: dw: define DW_DMA_MAX_NR_MASTERS	2015-02-04 22:39:44 -08:00