193 lines
6.1 KiB
C
193 lines
6.1 KiB
C
/*
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* Marvell MVEBU pinctrl driver
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*
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* Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __PINCTRL_MVEBU_H__
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#define __PINCTRL_MVEBU_H__
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/**
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* struct mvebu_mpp_ctrl - describe a mpp control
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* @name: name of the control group
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* @pid: first pin id handled by this control
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* @npins: number of pins controlled by this control
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* @mpp_get: (optional) special function to get mpp setting
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* @mpp_set: (optional) special function to set mpp setting
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* @mpp_gpio_req: (optional) special function to request gpio
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* @mpp_gpio_dir: (optional) special function to set gpio direction
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*
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* A mpp_ctrl describes a muxable unit, e.g. pin, group of pins, or
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* internal function, inside the SoC. Each muxable unit can be switched
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* between two or more different settings, e.g. assign mpp pin 13 to
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* uart1 or sata.
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*
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* If optional mpp_get/_set functions are set these are used to get/set
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* a specific mode. Otherwise it is assumed that the mpp control is based
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* on 4-bit groups in subsequent registers. The optional mpp_gpio_req/_dir
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* functions can be used to allow pin settings with varying gpio pins.
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*/
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struct mvebu_mpp_ctrl {
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const char *name;
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u8 pid;
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u8 npins;
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unsigned *pins;
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int (*mpp_get)(struct mvebu_mpp_ctrl *ctrl, unsigned long *config);
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int (*mpp_set)(struct mvebu_mpp_ctrl *ctrl, unsigned long config);
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int (*mpp_gpio_req)(struct mvebu_mpp_ctrl *ctrl, u8 pid);
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int (*mpp_gpio_dir)(struct mvebu_mpp_ctrl *ctrl, u8 pid, bool input);
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};
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/**
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* struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
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* @val: ctrl setting value
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* @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
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* @subname: (optional) additional ctrl setting name, e.g. rts, cts
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* @variant: (optional) variant identifier mask
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* @flags: (private) flags to store gpi/gpo/gpio capabilities
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*
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* A ctrl_setting describes a specific internal mux function that a mpp pin
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* can be switched to. The value (val) will be written in the corresponding
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* register for common mpp pin configuration registers on MVEBU. SoC specific
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* mpp_get/_set function may use val to distinguish between different settings.
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*
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* The name will be used to switch to this setting in DT description, e.g.
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* marvell,function = "uart2". subname is only for debugging purposes.
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*
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* If name is one of "gpi", "gpo", "gpio" gpio capabilities are
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* parsed during initialization and stored in flags.
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*
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* The variant can be used to combine different revisions of one SoC to a
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* common pinctrl driver. It is matched (AND) with variant of soc_info to
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* determine if a setting is available on the current SoC revision.
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*/
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struct mvebu_mpp_ctrl_setting {
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u8 val;
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const char *name;
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const char *subname;
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u8 variant;
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u8 flags;
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#define MVEBU_SETTING_GPO (1 << 0)
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#define MVEBU_SETTING_GPI (1 << 1)
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};
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/**
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* struct mvebu_mpp_mode - link ctrl and settings
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* @pid: first pin id handled by this mode
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* @settings: list of settings available for this mode
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*
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* A mode connects all available settings with the corresponding mpp_ctrl
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* given by pid.
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*/
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struct mvebu_mpp_mode {
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u8 pid;
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struct mvebu_mpp_ctrl_setting *settings;
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};
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/**
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* struct mvebu_pinctrl_soc_info - SoC specific info passed to pinctrl-mvebu
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* @variant: variant mask of soc_info
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* @controls: list of available mvebu_mpp_ctrls
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* @ncontrols: number of available mvebu_mpp_ctrls
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* @modes: list of available mvebu_mpp_modes
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* @nmodes: number of available mvebu_mpp_modes
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* @gpioranges: list of pinctrl_gpio_ranges
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* @ngpioranges: number of available pinctrl_gpio_ranges
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*
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* This struct describes all pinctrl related information for a specific SoC.
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* If variant is unequal 0 it will be matched (AND) with variant of each
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* setting and allows to distinguish between different revisions of one SoC.
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*/
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struct mvebu_pinctrl_soc_info {
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u8 variant;
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struct mvebu_mpp_ctrl *controls;
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int ncontrols;
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struct mvebu_mpp_mode *modes;
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int nmodes;
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struct pinctrl_gpio_range *gpioranges;
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int ngpioranges;
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};
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#define MPP_REG_CTRL(_idl, _idh) \
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{ \
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.name = NULL, \
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.pid = _idl, \
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.npins = _idh - _idl + 1, \
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.pins = (unsigned[_idh - _idl + 1]) { }, \
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.mpp_get = NULL, \
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.mpp_set = NULL, \
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.mpp_gpio_req = NULL, \
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.mpp_gpio_dir = NULL, \
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}
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#define MPP_FUNC_CTRL(_idl, _idh, _name, _func) \
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{ \
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.name = _name, \
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.pid = _idl, \
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.npins = _idh - _idl + 1, \
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.pins = (unsigned[_idh - _idl + 1]) { }, \
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.mpp_get = _func ## _get, \
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.mpp_set = _func ## _set, \
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.mpp_gpio_req = NULL, \
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.mpp_gpio_dir = NULL, \
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}
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#define MPP_FUNC_GPIO_CTRL(_idl, _idh, _name, _func) \
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{ \
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.name = _name, \
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.pid = _idl, \
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.npins = _idh - _idl + 1, \
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.pins = (unsigned[_idh - _idl + 1]) { }, \
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.mpp_get = _func ## _get, \
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.mpp_set = _func ## _set, \
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.mpp_gpio_req = _func ## _gpio_req, \
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.mpp_gpio_dir = _func ## _gpio_dir, \
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}
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#define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
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{ \
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.val = _val, \
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.name = _name, \
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.subname = _subname, \
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.variant = _mask, \
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.flags = 0, \
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}
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#if defined(CONFIG_DEBUG_FS)
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#define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
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_MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
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#else
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#define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
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_MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
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#endif
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#define MPP_FUNCTION(_val, _name, _subname) \
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MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1)
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#define MPP_MODE(_id, ...) \
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{ \
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.pid = _id, \
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.settings = (struct mvebu_mpp_ctrl_setting[]){ \
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__VA_ARGS__, { } }, \
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}
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#define MPP_GPIO_RANGE(_id, _pinbase, _gpiobase, _npins) \
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{ \
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.name = "mvebu-gpio", \
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.id = _id, \
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.pin_base = _pinbase, \
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.base = _gpiobase, \
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.npins = _npins, \
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}
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int mvebu_pinctrl_probe(struct platform_device *pdev);
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int mvebu_pinctrl_remove(struct platform_device *pdev);
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#endif
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