525 lines
14 KiB
C
525 lines
14 KiB
C
/*
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* kvm_host.h: used for kvm module, and hold ia64-specific sections.
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*
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* Copyright (C) 2007, Intel Corporation.
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*
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* Xiantao Zhang <xiantao.zhang@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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*/
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#ifndef __ASM_KVM_HOST_H
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#define __ASM_KVM_HOST_H
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/kvm.h>
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#include <linux/kvm_para.h>
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#include <linux/kvm_types.h>
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#include <asm/pal.h>
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#include <asm/sal.h>
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#define KVM_MAX_VCPUS 4
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#define KVM_MEMORY_SLOTS 32
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/* memory slots that does not exposed to userspace */
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#define KVM_PRIVATE_MEM_SLOTS 4
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/* define exit reasons from vmm to kvm*/
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#define EXIT_REASON_VM_PANIC 0
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#define EXIT_REASON_MMIO_INSTRUCTION 1
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#define EXIT_REASON_PAL_CALL 2
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#define EXIT_REASON_SAL_CALL 3
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#define EXIT_REASON_SWITCH_RR6 4
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#define EXIT_REASON_VM_DESTROY 5
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#define EXIT_REASON_EXTERNAL_INTERRUPT 6
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#define EXIT_REASON_IPI 7
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#define EXIT_REASON_PTC_G 8
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/*Define vmm address space and vm data space.*/
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#define KVM_VMM_SIZE (16UL<<20)
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#define KVM_VMM_SHIFT 24
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#define KVM_VMM_BASE 0xD000000000000000UL
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#define VMM_SIZE (8UL<<20)
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/*
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* Define vm_buffer, used by PAL Services, base address.
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* Note: vmbuffer is in the VMM-BLOCK, the size must be < 8M
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*/
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#define KVM_VM_BUFFER_BASE (KVM_VMM_BASE + VMM_SIZE)
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#define KVM_VM_BUFFER_SIZE (8UL<<20)
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/*Define Virtual machine data layout.*/
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#define KVM_VM_DATA_SHIFT 24
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#define KVM_VM_DATA_SIZE (1UL << KVM_VM_DATA_SHIFT)
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#define KVM_VM_DATA_BASE (KVM_VMM_BASE + KVM_VMM_SIZE)
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#define KVM_P2M_BASE KVM_VM_DATA_BASE
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#define KVM_P2M_OFS 0
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#define KVM_P2M_SIZE (8UL << 20)
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#define KVM_VHPT_BASE (KVM_P2M_BASE + KVM_P2M_SIZE)
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#define KVM_VHPT_OFS KVM_P2M_SIZE
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#define KVM_VHPT_BLOCK_SIZE (2UL << 20)
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#define VHPT_SHIFT 18
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#define VHPT_SIZE (1UL << VHPT_SHIFT)
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#define VHPT_NUM_ENTRIES (1<<(VHPT_SHIFT-5))
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#define KVM_VTLB_BASE (KVM_VHPT_BASE+KVM_VHPT_BLOCK_SIZE)
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#define KVM_VTLB_OFS (KVM_VHPT_OFS+KVM_VHPT_BLOCK_SIZE)
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#define KVM_VTLB_BLOCK_SIZE (1UL<<20)
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#define VTLB_SHIFT 17
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#define VTLB_SIZE (1UL<<VTLB_SHIFT)
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#define VTLB_NUM_ENTRIES (1<<(VTLB_SHIFT-5))
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#define KVM_VPD_BASE (KVM_VTLB_BASE+KVM_VTLB_BLOCK_SIZE)
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#define KVM_VPD_OFS (KVM_VTLB_OFS+KVM_VTLB_BLOCK_SIZE)
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#define KVM_VPD_BLOCK_SIZE (2UL<<20)
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#define VPD_SHIFT 16
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#define VPD_SIZE (1UL<<VPD_SHIFT)
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#define KVM_VCPU_BASE (KVM_VPD_BASE+KVM_VPD_BLOCK_SIZE)
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#define KVM_VCPU_OFS (KVM_VPD_OFS+KVM_VPD_BLOCK_SIZE)
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#define KVM_VCPU_BLOCK_SIZE (2UL<<20)
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#define VCPU_SHIFT 18
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#define VCPU_SIZE (1UL<<VCPU_SHIFT)
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#define MAX_VCPU_NUM KVM_VCPU_BLOCK_SIZE/VCPU_SIZE
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#define KVM_VM_BASE (KVM_VCPU_BASE+KVM_VCPU_BLOCK_SIZE)
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#define KVM_VM_OFS (KVM_VCPU_OFS+KVM_VCPU_BLOCK_SIZE)
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#define KVM_VM_BLOCK_SIZE (1UL<<19)
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#define KVM_MEM_DIRTY_LOG_BASE (KVM_VM_BASE+KVM_VM_BLOCK_SIZE)
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#define KVM_MEM_DIRTY_LOG_OFS (KVM_VM_OFS+KVM_VM_BLOCK_SIZE)
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#define KVM_MEM_DIRTY_LOG_SIZE (1UL<<19)
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/* Get vpd, vhpt, tlb, vcpu, base*/
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#define VPD_ADDR(n) (KVM_VPD_BASE+n*VPD_SIZE)
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#define VHPT_ADDR(n) (KVM_VHPT_BASE+n*VHPT_SIZE)
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#define VTLB_ADDR(n) (KVM_VTLB_BASE+n*VTLB_SIZE)
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#define VCPU_ADDR(n) (KVM_VCPU_BASE+n*VCPU_SIZE)
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/*IO section definitions*/
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#define IOREQ_READ 1
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#define IOREQ_WRITE 0
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#define STATE_IOREQ_NONE 0
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#define STATE_IOREQ_READY 1
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#define STATE_IOREQ_INPROCESS 2
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#define STATE_IORESP_READY 3
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/*Guest Physical address layout.*/
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#define GPFN_MEM (0UL << 60) /* Guest pfn is normal mem */
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#define GPFN_FRAME_BUFFER (1UL << 60) /* VGA framebuffer */
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#define GPFN_LOW_MMIO (2UL << 60) /* Low MMIO range */
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#define GPFN_PIB (3UL << 60) /* PIB base */
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#define GPFN_IOSAPIC (4UL << 60) /* IOSAPIC base */
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#define GPFN_LEGACY_IO (5UL << 60) /* Legacy I/O base */
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#define GPFN_GFW (6UL << 60) /* Guest Firmware */
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#define GPFN_HIGH_MMIO (7UL << 60) /* High MMIO range */
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#define GPFN_IO_MASK (7UL << 60) /* Guest pfn is I/O type */
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#define GPFN_INV_MASK (1UL << 63) /* Guest pfn is invalid */
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#define INVALID_MFN (~0UL)
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#define MEM_G (1UL << 30)
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#define MEM_M (1UL << 20)
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#define MMIO_START (3 * MEM_G)
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#define MMIO_SIZE (512 * MEM_M)
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#define VGA_IO_START 0xA0000UL
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#define VGA_IO_SIZE 0x20000
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#define LEGACY_IO_START (MMIO_START + MMIO_SIZE)
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#define LEGACY_IO_SIZE (64 * MEM_M)
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#define IO_SAPIC_START 0xfec00000UL
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#define IO_SAPIC_SIZE 0x100000
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#define PIB_START 0xfee00000UL
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#define PIB_SIZE 0x200000
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#define GFW_START (4 * MEM_G - 16 * MEM_M)
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#define GFW_SIZE (16 * MEM_M)
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/*Deliver mode, defined for ioapic.c*/
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#define dest_Fixed IOSAPIC_FIXED
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#define dest_LowestPrio IOSAPIC_LOWEST_PRIORITY
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#define NMI_VECTOR 2
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#define ExtINT_VECTOR 0
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#define NULL_VECTOR (-1)
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#define IA64_SPURIOUS_INT_VECTOR 0x0f
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#define VCPU_LID(v) (((u64)(v)->vcpu_id) << 24)
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/*
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*Delivery mode
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*/
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#define SAPIC_DELIV_SHIFT 8
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#define SAPIC_FIXED 0x0
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#define SAPIC_LOWEST_PRIORITY 0x1
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#define SAPIC_PMI 0x2
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#define SAPIC_NMI 0x4
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#define SAPIC_INIT 0x5
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#define SAPIC_EXTINT 0x7
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/*
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* vcpu->requests bit members for arch
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*/
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#define KVM_REQ_PTC_G 32
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#define KVM_REQ_RESUME 33
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#define KVM_PAGES_PER_HPAGE 1
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struct kvm;
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struct kvm_vcpu;
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struct kvm_guest_debug{
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};
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struct kvm_mmio_req {
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uint64_t addr; /* physical address */
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uint64_t size; /* size in bytes */
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uint64_t data; /* data (or paddr of data) */
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uint8_t state:4;
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uint8_t dir:1; /* 1=read, 0=write */
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};
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/*Pal data struct */
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struct kvm_pal_call{
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/*In area*/
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uint64_t gr28;
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uint64_t gr29;
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uint64_t gr30;
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uint64_t gr31;
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/*Out area*/
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struct ia64_pal_retval ret;
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};
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/* Sal data structure */
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struct kvm_sal_call{
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/*In area*/
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uint64_t in0;
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uint64_t in1;
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uint64_t in2;
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uint64_t in3;
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uint64_t in4;
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uint64_t in5;
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uint64_t in6;
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uint64_t in7;
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struct sal_ret_values ret;
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};
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/*Guest change rr6*/
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struct kvm_switch_rr6 {
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uint64_t old_rr;
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uint64_t new_rr;
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};
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union ia64_ipi_a{
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unsigned long val;
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struct {
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unsigned long rv : 3;
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unsigned long ir : 1;
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unsigned long eid : 8;
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unsigned long id : 8;
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unsigned long ib_base : 44;
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};
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};
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union ia64_ipi_d {
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unsigned long val;
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struct {
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unsigned long vector : 8;
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unsigned long dm : 3;
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unsigned long ig : 53;
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};
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};
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/*ipi check exit data*/
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struct kvm_ipi_data{
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union ia64_ipi_a addr;
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union ia64_ipi_d data;
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};
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/*global purge data*/
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struct kvm_ptc_g {
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unsigned long vaddr;
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unsigned long rr;
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unsigned long ps;
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struct kvm_vcpu *vcpu;
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};
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/*Exit control data */
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struct exit_ctl_data{
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uint32_t exit_reason;
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uint32_t vm_status;
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union {
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struct kvm_mmio_req ioreq;
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struct kvm_pal_call pal_data;
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struct kvm_sal_call sal_data;
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struct kvm_switch_rr6 rr_data;
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struct kvm_ipi_data ipi_data;
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struct kvm_ptc_g ptc_g_data;
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} u;
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};
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union pte_flags {
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unsigned long val;
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struct {
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unsigned long p : 1; /*0 */
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unsigned long : 1; /* 1 */
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unsigned long ma : 3; /* 2-4 */
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unsigned long a : 1; /* 5 */
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unsigned long d : 1; /* 6 */
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unsigned long pl : 2; /* 7-8 */
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unsigned long ar : 3; /* 9-11 */
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unsigned long ppn : 38; /* 12-49 */
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unsigned long : 2; /* 50-51 */
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unsigned long ed : 1; /* 52 */
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};
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};
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union ia64_pta {
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unsigned long val;
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struct {
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unsigned long ve : 1;
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unsigned long reserved0 : 1;
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unsigned long size : 6;
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unsigned long vf : 1;
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unsigned long reserved1 : 6;
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unsigned long base : 49;
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};
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};
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struct thash_cb {
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/* THASH base information */
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struct thash_data *hash; /* hash table pointer */
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union ia64_pta pta;
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int num;
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};
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struct kvm_vcpu_stat {
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};
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struct kvm_vcpu_arch {
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int launched;
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int last_exit;
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int last_run_cpu;
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int vmm_tr_slot;
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int vm_tr_slot;
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#define KVM_MP_STATE_RUNNABLE 0
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#define KVM_MP_STATE_UNINITIALIZED 1
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#define KVM_MP_STATE_INIT_RECEIVED 2
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#define KVM_MP_STATE_HALTED 3
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int mp_state;
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#define MAX_PTC_G_NUM 3
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int ptc_g_count;
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struct kvm_ptc_g ptc_g_data[MAX_PTC_G_NUM];
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/*halt timer to wake up sleepy vcpus*/
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struct hrtimer hlt_timer;
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long ht_active;
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struct kvm_lapic *apic; /* kernel irqchip context */
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struct vpd *vpd;
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/* Exit data for vmm_transition*/
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struct exit_ctl_data exit_data;
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cpumask_t cache_coherent_map;
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unsigned long vmm_rr;
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unsigned long host_rr6;
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unsigned long psbits[8];
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unsigned long cr_iipa;
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unsigned long cr_isr;
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unsigned long vsa_base;
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unsigned long dirty_log_lock_pa;
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unsigned long __gp;
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/* TR and TC. */
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struct thash_data itrs[NITRS];
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struct thash_data dtrs[NDTRS];
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/* Bit is set if there is a tr/tc for the region. */
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unsigned char itr_regions;
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unsigned char dtr_regions;
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unsigned char tc_regions;
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/* purge all */
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unsigned long ptce_base;
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unsigned long ptce_count[2];
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unsigned long ptce_stride[2];
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/* itc/itm */
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unsigned long last_itc;
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long itc_offset;
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unsigned long itc_check;
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unsigned long timer_check;
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unsigned long timer_pending;
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unsigned long vrr[8];
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unsigned long ibr[8];
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unsigned long dbr[8];
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unsigned long insvc[4]; /* Interrupt in service. */
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unsigned long xtp;
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unsigned long metaphysical_rr0; /* from kvm_arch (so is pinned) */
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unsigned long metaphysical_rr4; /* from kvm_arch (so is pinned) */
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unsigned long metaphysical_saved_rr0; /* from kvm_arch */
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unsigned long metaphysical_saved_rr4; /* from kvm_arch */
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unsigned long fp_psr; /*used for lazy float register */
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unsigned long saved_gp;
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/*for phycial emulation */
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int mode_flags;
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struct thash_cb vtlb;
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struct thash_cb vhpt;
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char irq_check;
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char irq_new_pending;
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unsigned long opcode;
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unsigned long cause;
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union context host;
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union context guest;
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};
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struct kvm_vm_stat {
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u64 remote_tlb_flush;
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};
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struct kvm_sal_data {
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unsigned long boot_ip;
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unsigned long boot_gp;
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};
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struct kvm_arch {
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unsigned long vm_base;
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unsigned long metaphysical_rr0;
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unsigned long metaphysical_rr4;
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unsigned long vmm_init_rr;
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unsigned long vhpt_base;
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unsigned long vtlb_base;
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unsigned long vpd_base;
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spinlock_t dirty_log_lock;
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struct kvm_ioapic *vioapic;
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struct kvm_vm_stat stat;
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struct kvm_sal_data rdv_sal_data;
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};
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union cpuid3_t {
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u64 value;
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struct {
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u64 number : 8;
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u64 revision : 8;
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u64 model : 8;
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u64 family : 8;
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u64 archrev : 8;
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u64 rv : 24;
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};
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};
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struct kvm_pt_regs {
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/* The following registers are saved by SAVE_MIN: */
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unsigned long b6; /* scratch */
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unsigned long b7; /* scratch */
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unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
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unsigned long ar_ssd; /* reserved for future use (scratch) */
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unsigned long r8; /* scratch (return value register 0) */
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unsigned long r9; /* scratch (return value register 1) */
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unsigned long r10; /* scratch (return value register 2) */
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unsigned long r11; /* scratch (return value register 3) */
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unsigned long cr_ipsr; /* interrupted task's psr */
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unsigned long cr_iip; /* interrupted task's instruction pointer */
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unsigned long cr_ifs; /* interrupted task's function state */
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unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
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unsigned long ar_pfs; /* prev function state */
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unsigned long ar_rsc; /* RSE configuration */
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/* The following two are valid only if cr_ipsr.cpl > 0: */
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unsigned long ar_rnat; /* RSE NaT */
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unsigned long ar_bspstore; /* RSE bspstore */
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unsigned long pr; /* 64 predicate registers (1 bit each) */
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unsigned long b0; /* return pointer (bp) */
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unsigned long loadrs; /* size of dirty partition << 16 */
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unsigned long r1; /* the gp pointer */
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unsigned long r12; /* interrupted task's memory stack pointer */
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unsigned long r13; /* thread pointer */
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unsigned long ar_fpsr; /* floating point status (preserved) */
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unsigned long r15; /* scratch */
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/* The remaining registers are NOT saved for system calls. */
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unsigned long r14; /* scratch */
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unsigned long r2; /* scratch */
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unsigned long r3; /* scratch */
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unsigned long r16; /* scratch */
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unsigned long r17; /* scratch */
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unsigned long r18; /* scratch */
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unsigned long r19; /* scratch */
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unsigned long r20; /* scratch */
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unsigned long r21; /* scratch */
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unsigned long r22; /* scratch */
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unsigned long r23; /* scratch */
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unsigned long r24; /* scratch */
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unsigned long r25; /* scratch */
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unsigned long r26; /* scratch */
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unsigned long r27; /* scratch */
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unsigned long r28; /* scratch */
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unsigned long r29; /* scratch */
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unsigned long r30; /* scratch */
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unsigned long r31; /* scratch */
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unsigned long ar_ccv; /* compare/exchange value (scratch) */
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/*
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* Floating point registers that the kernel considers scratch:
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*/
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struct ia64_fpreg f6; /* scratch */
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struct ia64_fpreg f7; /* scratch */
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struct ia64_fpreg f8; /* scratch */
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struct ia64_fpreg f9; /* scratch */
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|
struct ia64_fpreg f10; /* scratch */
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struct ia64_fpreg f11; /* scratch */
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|
|
|
unsigned long r4; /* preserved */
|
|
unsigned long r5; /* preserved */
|
|
unsigned long r6; /* preserved */
|
|
unsigned long r7; /* preserved */
|
|
unsigned long eml_unat; /* used for emulating instruction */
|
|
unsigned long pad0; /* alignment pad */
|
|
};
|
|
|
|
static inline struct kvm_pt_regs *vcpu_regs(struct kvm_vcpu *v)
|
|
{
|
|
return (struct kvm_pt_regs *) ((unsigned long) v + IA64_STK_OFFSET) - 1;
|
|
}
|
|
|
|
typedef int kvm_vmm_entry(void);
|
|
typedef void kvm_tramp_entry(union context *host, union context *guest);
|
|
|
|
struct kvm_vmm_info{
|
|
struct module *module;
|
|
kvm_vmm_entry *vmm_entry;
|
|
kvm_tramp_entry *tramp_entry;
|
|
unsigned long vmm_ivt;
|
|
};
|
|
|
|
int kvm_highest_pending_irq(struct kvm_vcpu *vcpu);
|
|
int kvm_emulate_halt(struct kvm_vcpu *vcpu);
|
|
int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run);
|
|
void kvm_sal_emul(struct kvm_vcpu *vcpu);
|
|
|
|
#endif
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