vikrant mhaske 3fc9fc4cf5 drm/amd/display: DPP CM ICSC AYCRCB8888 format support ... [why] Diags has POR to run the video workload using AYCRCB8888 through DCN; capture it through DWB and send it to VCN hardware to encode [how] added the code to support this format so that DPP ICSC will be able to convert it from YUV444 to internal RGB and DWB OCSC will be able to convert from internal RGB to YUV420 Signed-off-by: vikrant mhaske <vikrant.mhaske@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-07-24 15:15:41 -05:00
..
amdgpu_dm	drm/amd/display: Convert 10kHz clks from PPLib into kHz	2018-07-20 14:24:10 -05:00
dc	drm/amd/display: DPP CM ICSC AYCRCB8888 format support	2018-07-24 15:15:41 -05:00
include	drm/amd/display: read DP sink and DP branch hardware and firmware revision from DPCD	2018-07-13 14:48:49 -05:00
modules	drm/amd/display: Add headers for hardcoded 1d luts.	2018-07-16 16:11:48 -05:00
Kconfig	drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86	2018-07-19 13:56:43 -05:00
Makefile	drm/amd: Remove inclusion of non-existing include directories	2018-02-26 23:09:38 -05:00
TODO	drm/amd/display: Convert remaining loggers off dc_logger	2018-07-13 14:48:42 -05:00