c27a2164a3
Patch from Catalin Marinas The initial code did not configure the inbound memory windows for direct master access to the SDRAM. This patch creates a 1:1 mapping between the Versatile/PB PCI memory windows and its SDRAM. Note that an updated FPGA image is needed for Versatile/PB since the original windows were 1MB and not able to cover the whole SDRAM (now extended to 256MB). The patch also fixes the PCI IRQ mapping for slot #2. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
||
---|---|---|
.. | ||
Kconfig | ||
Makefile | ||
Makefile.boot | ||
clock.c | ||
clock.h | ||
core.c | ||
core.h | ||
pci.c | ||
versatile_ab.c | ||
versatile_pb.c |