442 lines
8.7 KiB
C
442 lines
8.7 KiB
C
/*
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* Architecture specific OF callbacks.
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*/
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#include <linux/bootmem.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/of_irq.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/of_pci.h>
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#include <asm/hpet.h>
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#include <asm/irq_controller.h>
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#include <asm/apic.h>
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#include <asm/pci_x86.h>
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__initdata u64 initial_dtb;
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char __initdata cmd_line[COMMAND_LINE_SIZE];
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static LIST_HEAD(irq_domains);
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static DEFINE_RAW_SPINLOCK(big_irq_lock);
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int __initdata of_ioapic;
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#ifdef CONFIG_X86_IO_APIC
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static void add_interrupt_host(struct irq_domain *ih)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&big_irq_lock, flags);
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list_add(&ih->l, &irq_domains);
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raw_spin_unlock_irqrestore(&big_irq_lock, flags);
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}
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#endif
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static struct irq_domain *get_ih_from_node(struct device_node *controller)
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{
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struct irq_domain *ih, *found = NULL;
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unsigned long flags;
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raw_spin_lock_irqsave(&big_irq_lock, flags);
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list_for_each_entry(ih, &irq_domains, l) {
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if (ih->controller == controller) {
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found = ih;
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break;
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}
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}
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raw_spin_unlock_irqrestore(&big_irq_lock, flags);
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return found;
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}
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unsigned int irq_create_of_mapping(struct device_node *controller,
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const u32 *intspec, unsigned int intsize)
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{
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struct irq_domain *ih;
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u32 virq, type;
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int ret;
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ih = get_ih_from_node(controller);
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if (!ih)
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return 0;
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ret = ih->xlate(ih, intspec, intsize, &virq, &type);
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if (ret)
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return 0;
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if (type == IRQ_TYPE_NONE)
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return virq;
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irq_set_irq_type(virq, type);
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return virq;
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}
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EXPORT_SYMBOL_GPL(irq_create_of_mapping);
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unsigned long pci_address_to_pio(phys_addr_t address)
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{
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/*
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* The ioport address can be directly used by inX / outX
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*/
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BUG_ON(address >= (1 << 16));
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return (unsigned long)address;
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}
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EXPORT_SYMBOL_GPL(pci_address_to_pio);
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void __init early_init_dt_scan_chosen_arch(unsigned long node)
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{
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BUG();
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}
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void __init early_init_dt_add_memory_arch(u64 base, u64 size)
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{
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BUG();
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}
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void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
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{
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return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
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}
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void __init add_dtb(u64 data)
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{
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initial_dtb = data + offsetof(struct setup_data, data);
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}
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/*
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* CE4100 ids. Will be moved to machine_device_initcall() once we have it.
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*/
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static struct of_device_id __initdata ce4100_ids[] = {
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{ .compatible = "intel,ce4100-cp", },
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{ .compatible = "isa", },
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{ .compatible = "pci", },
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{},
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};
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static int __init add_bus_probe(void)
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{
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if (!of_have_populated_dt())
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return 0;
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return of_platform_bus_probe(NULL, ce4100_ids, NULL);
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}
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module_init(add_bus_probe);
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#ifdef CONFIG_PCI
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static int x86_of_pci_irq_enable(struct pci_dev *dev)
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{
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struct of_irq oirq;
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u32 virq;
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int ret;
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u8 pin;
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ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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if (ret)
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return ret;
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if (!pin)
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return 0;
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ret = of_irq_map_pci(dev, &oirq);
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if (ret)
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return ret;
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virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
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oirq.size);
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if (virq == 0)
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return -EINVAL;
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dev->irq = virq;
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return 0;
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}
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static void x86_of_pci_irq_disable(struct pci_dev *dev)
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{
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}
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void __cpuinit x86_of_pci_init(void)
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{
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struct device_node *np;
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pcibios_enable_irq = x86_of_pci_irq_enable;
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pcibios_disable_irq = x86_of_pci_irq_disable;
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for_each_node_by_type(np, "pci") {
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const void *prop;
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struct pci_bus *bus;
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unsigned int bus_min;
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struct device_node *child;
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prop = of_get_property(np, "bus-range", NULL);
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if (!prop)
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continue;
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bus_min = be32_to_cpup(prop);
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bus = pci_find_bus(0, bus_min);
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if (!bus) {
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printk(KERN_ERR "Can't find a node for bus %s.\n",
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np->full_name);
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continue;
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}
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if (bus->self)
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bus->self->dev.of_node = np;
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else
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bus->dev.of_node = np;
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for_each_child_of_node(np, child) {
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struct pci_dev *dev;
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u32 devfn;
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prop = of_get_property(child, "reg", NULL);
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if (!prop)
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continue;
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devfn = (be32_to_cpup(prop) >> 8) & 0xff;
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dev = pci_get_slot(bus, devfn);
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if (!dev)
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continue;
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dev->dev.of_node = child;
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pci_dev_put(dev);
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}
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}
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}
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#endif
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static void __init dtb_setup_hpet(void)
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{
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#ifdef CONFIG_HPET_TIMER
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struct device_node *dn;
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struct resource r;
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int ret;
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dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
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if (!dn)
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return;
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ret = of_address_to_resource(dn, 0, &r);
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if (ret) {
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WARN_ON(1);
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return;
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}
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hpet_address = r.start;
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#endif
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}
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static void __init dtb_lapic_setup(void)
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{
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#ifdef CONFIG_X86_LOCAL_APIC
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struct device_node *dn;
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struct resource r;
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int ret;
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dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
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if (!dn)
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return;
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ret = of_address_to_resource(dn, 0, &r);
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if (WARN_ON(ret))
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return;
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/* Did the boot loader setup the local APIC ? */
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if (!cpu_has_apic) {
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if (apic_force_enable(r.start))
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return;
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}
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smp_found_config = 1;
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pic_mode = 1;
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register_lapic_address(r.start);
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generic_processor_info(boot_cpu_physical_apicid,
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GET_APIC_VERSION(apic_read(APIC_LVR)));
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#endif
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}
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#ifdef CONFIG_X86_IO_APIC
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static unsigned int ioapic_id;
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static void __init dtb_add_ioapic(struct device_node *dn)
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{
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struct resource r;
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int ret;
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ret = of_address_to_resource(dn, 0, &r);
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if (ret) {
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printk(KERN_ERR "Can't obtain address from node %s.\n",
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dn->full_name);
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return;
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}
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mp_register_ioapic(++ioapic_id, r.start, gsi_top);
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}
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static void __init dtb_ioapic_setup(void)
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{
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struct device_node *dn;
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for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
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dtb_add_ioapic(dn);
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if (nr_ioapics) {
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of_ioapic = 1;
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return;
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}
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printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
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}
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#else
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static void __init dtb_ioapic_setup(void) {}
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#endif
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static void __init dtb_apic_setup(void)
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{
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dtb_lapic_setup();
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dtb_ioapic_setup();
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}
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#ifdef CONFIG_OF_FLATTREE
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static void __init x86_flattree_get_config(void)
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{
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u32 size, map_len;
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void *new_dtb;
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if (!initial_dtb)
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return;
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map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
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(u64)sizeof(struct boot_param_header));
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initial_boot_params = early_memremap(initial_dtb, map_len);
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size = be32_to_cpu(initial_boot_params->totalsize);
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if (map_len < size) {
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early_iounmap(initial_boot_params, map_len);
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initial_boot_params = early_memremap(initial_dtb, size);
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map_len = size;
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}
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new_dtb = alloc_bootmem(size);
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memcpy(new_dtb, initial_boot_params, size);
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early_iounmap(initial_boot_params, map_len);
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initial_boot_params = new_dtb;
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/* root level address cells */
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of_scan_flat_dt(early_init_dt_scan_root, NULL);
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unflatten_device_tree();
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}
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#else
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static inline void x86_flattree_get_config(void) { }
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#endif
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void __init x86_dtb_init(void)
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{
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x86_flattree_get_config();
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if (!of_have_populated_dt())
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return;
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dtb_setup_hpet();
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dtb_apic_setup();
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}
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#ifdef CONFIG_X86_IO_APIC
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struct of_ioapic_type {
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u32 out_type;
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u32 trigger;
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u32 polarity;
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};
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static struct of_ioapic_type of_ioapic_type[] =
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{
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{
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.out_type = IRQ_TYPE_EDGE_RISING,
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.trigger = IOAPIC_EDGE,
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.polarity = 1,
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},
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{
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.out_type = IRQ_TYPE_LEVEL_LOW,
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.trigger = IOAPIC_LEVEL,
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.polarity = 0,
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},
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{
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.out_type = IRQ_TYPE_LEVEL_HIGH,
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.trigger = IOAPIC_LEVEL,
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.polarity = 1,
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},
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{
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.out_type = IRQ_TYPE_EDGE_FALLING,
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.trigger = IOAPIC_EDGE,
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.polarity = 0,
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},
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};
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static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
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u32 *out_hwirq, u32 *out_type)
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{
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struct mp_ioapic_gsi *gsi_cfg;
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struct io_apic_irq_attr attr;
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struct of_ioapic_type *it;
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u32 line, idx, type;
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if (intsize < 2)
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return -EINVAL;
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line = *intspec;
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idx = (u32) id->priv;
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gsi_cfg = mp_ioapic_gsi_routing(idx);
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*out_hwirq = line + gsi_cfg->gsi_base;
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intspec++;
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type = *intspec;
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if (type >= ARRAY_SIZE(of_ioapic_type))
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return -EINVAL;
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it = of_ioapic_type + type;
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*out_type = it->out_type;
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set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
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return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr);
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}
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static void __init ioapic_add_ofnode(struct device_node *np)
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{
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struct resource r;
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int i, ret;
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ret = of_address_to_resource(np, 0, &r);
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if (ret) {
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printk(KERN_ERR "Failed to obtain address for %s\n",
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np->full_name);
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return;
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}
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for (i = 0; i < nr_ioapics; i++) {
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if (r.start == mpc_ioapic_addr(i)) {
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struct irq_domain *id;
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id = kzalloc(sizeof(*id), GFP_KERNEL);
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BUG_ON(!id);
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id->controller = np;
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id->xlate = ioapic_xlate;
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id->priv = (void *)i;
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add_interrupt_host(id);
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return;
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}
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}
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printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
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}
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void __init x86_add_irq_domains(void)
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{
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struct device_node *dp;
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if (!of_have_populated_dt())
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return;
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for_each_node_with_property(dp, "interrupt-controller") {
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if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
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ioapic_add_ofnode(dp);
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}
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}
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#else
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void __init x86_add_irq_domains(void) { }
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#endif
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