348 lines
8.2 KiB
Plaintext
348 lines
8.2 KiB
Plaintext
/*
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* Device Tree Source for AMCC Rainier
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*
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* Based on Sequoia code
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* Copyright (c) 2007 MontaVista Software, Inc.
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*
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* FIXME: Draft only!
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*
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*/
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "amcc,rainier";
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compatible = "amcc,rainier";
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dcr-parent = <&/cpus/cpu@0>;
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aliases {
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ethernet0 = &EMAC0;
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ethernet1 = &EMAC1;
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serial0 = &UART0;
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serial1 = &UART1;
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serial2 = &UART2;
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serial3 = &UART3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,440GRx";
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reg = <0>;
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clock-frequency = <0>; /* Filled in by zImage */
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timebase-frequency = <0>; /* Filled in by zImage */
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i-cache-line-size = <20>;
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d-cache-line-size = <20>;
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i-cache-size = <8000>;
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d-cache-size = <8000>;
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0 0 0>; /* Filled in by zImage */
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440grx","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0c0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440grx","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0d0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <1e 4 1f 4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC2: interrupt-controller2 {
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compatible = "ibm,uic-440grx","ibm,uic";
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interrupt-controller;
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cell-index = <2>;
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dcr-reg = <0e0 009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <1c 4 1d 4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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SDR0: sdr {
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compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
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dcr-reg = <00e 002>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
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dcr-reg = <00c 002>;
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};
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plb {
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compatible = "ibm,plb-440grx", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by zImage */
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SDRAM0: sdram {
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compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
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dcr-reg = <010 2>;
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};
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DMA0: dma {
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compatible = "ibm,dma-440grx", "ibm,dma-4xx";
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dcr-reg = <100 027>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
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dcr-reg = <180 62>;
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num-tx-chans = <2>;
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num-rx-chans = <2>;
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interrupt-parent = <&MAL0>;
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interrupts = <0 1 2 3 4>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
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/*RXEOB*/ 1 &UIC0 b 4
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/*SERR*/ 2 &UIC1 0 4
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/*TXDE*/ 3 &UIC1 1 4
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/*RXDE*/ 4 &UIC1 2 4>;
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interrupt-map-mask = <ffffffff>;
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};
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POB0: opb {
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compatible = "ibm,opb-440grx", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <00000000 1 00000000 80000000
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80000000 1 80000000 80000000>;
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interrupt-parent = <&UIC1>;
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interrupts = <7 4>;
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clock-frequency = <0>; /* Filled in by zImage */
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EBC0: ebc {
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compatible = "ibm,ebc-440grx", "ibm,ebc";
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dcr-reg = <012 2>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by zImage */
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interrupts = <5 1>;
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interrupt-parent = <&UIC1>;
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nor_flash@0,0 {
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compatible = "amd,s29gl256n", "cfi-flash";
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bank-width = <2>;
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reg = <0 000000 4000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Kernel";
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reg = <0 180000>;
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};
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partition@180000 {
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label = "ramdisk";
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reg = <180000 200000>;
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};
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partition@380000 {
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label = "file system";
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reg = <380000 3aa0000>;
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};
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partition@3e20000 {
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label = "kozio";
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reg = <3e20000 140000>;
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};
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partition@3f60000 {
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label = "env";
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reg = <3f60000 40000>;
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};
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partition@3fa0000 {
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label = "u-boot";
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reg = <3fa0000 60000>;
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};
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};
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600300 8>;
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virtual-reg = <ef600300>;
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clock-frequency = <0>; /* Filled in by zImage */
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current-speed = <1c200>;
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interrupt-parent = <&UIC0>;
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interrupts = <0 4>;
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600400 8>;
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virtual-reg = <ef600400>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC0>;
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interrupts = <1 4>;
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};
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UART2: serial@ef600500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600500 8>;
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virtual-reg = <ef600500>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC1>;
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interrupts = <3 4>;
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};
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UART3: serial@ef600600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <ef600600 8>;
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virtual-reg = <ef600600>;
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clock-frequency = <0>;
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current-speed = <0>;
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interrupt-parent = <&UIC1>;
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interrupts = <4 4>;
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};
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IIC0: i2c@ef600700 {
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compatible = "ibm,iic-440grx", "ibm,iic";
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reg = <ef600700 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <2 4>;
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};
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IIC1: i2c@ef600800 {
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compatible = "ibm,iic-440grx", "ibm,iic";
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reg = <ef600800 14>;
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interrupt-parent = <&UIC0>;
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interrupts = <7 4>;
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};
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ZMII0: emac-zmii@ef600d00 {
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compatible = "ibm,zmii-440grx", "ibm,zmii";
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reg = <ef600d00 c>;
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};
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RGMII0: emac-rgmii@ef601000 {
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compatible = "ibm,rgmii-440grx", "ibm,rgmii";
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reg = <ef601000 8>;
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has-mdio;
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};
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EMAC0: ethernet@ef600e00 {
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device_type = "network";
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compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
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interrupt-parent = <&EMAC0>;
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interrupts = <0 1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0 &UIC0 18 4
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/*Wake*/ 1 &UIC1 1d 4>;
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reg = <ef600e00 70>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <0>;
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mal-rx-channel = <0>;
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cell-index = <0>;
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max-frame-size = <2328>;
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rx-fifo-size = <1000>;
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tx-fifo-size = <800>;
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phy-mode = "rgmii";
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phy-map = <00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <0>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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EMAC1: ethernet@ef600f00 {
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device_type = "network";
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compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
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interrupt-parent = <&EMAC1>;
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interrupts = <0 1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*Status*/ 0 &UIC0 19 4
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/*Wake*/ 1 &UIC1 1f 4>;
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reg = <ef600f00 70>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <1>;
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mal-rx-channel = <1>;
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cell-index = <1>;
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max-frame-size = <2328>;
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rx-fifo-size = <1000>;
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tx-fifo-size = <800>;
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phy-mode = "rgmii";
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phy-map = <00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <1>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <1>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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};
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};
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PCI0: pci@1ec000000 {
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
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primary;
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reg = <1 eec00000 8 /* Config space access */
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1 eed00000 4 /* IACK */
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1 eed00000 4 /* Special cycle */
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1 ef400000 40>; /* Internal registers */
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed. Chip supports a second
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* IO range but we don't use it for now
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*/
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ranges = <02000000 0 80000000 1 80000000 0 10000000
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01000000 0 00000000 1 e8000000 0 00100000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <42000000 0 0 0 0 0 80000000>;
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/* All PCI interrupts are routed to IRQ 67 */
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interrupt-map-mask = <0000 0 0 0>;
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interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
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};
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};
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chosen {
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linux,stdout-path = "/plb/opb/serial@ef600300";
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bootargs = "console=ttyS0,115200";
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};
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};
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