420 lines
9.8 KiB
C
420 lines
9.8 KiB
C
/*
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* FILE NAME ite_gpio.c
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*
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* BRIEF MODULE DESCRIPTION
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* API for ITE GPIO device.
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* Driver for ITE GPIO device.
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*
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* Author: MontaVista Software, Inc. <source@mvista.com>
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* Hai-Pao Fan <haipao@mvista.com>
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*
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* Copyright 2001 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <asm/uaccess.h>
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#include <asm/addrspace.h>
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#include <asm/it8172/it8172_int.h>
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#include <linux/sched.h>
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#include <linux/ite_gpio.h>
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#define ite_gpio_base 0x14013800
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#define ITE_GPADR (*(volatile __u8 *)(0x14013800 + KSEG1))
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#define ITE_GPBDR (*(volatile __u8 *)(0x14013808 + KSEG1))
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#define ITE_GPCDR (*(volatile __u8 *)(0x14013810 + KSEG1))
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#define ITE_GPACR (*(volatile __u16 *)(0x14013802 + KSEG1))
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#define ITE_GPBCR (*(volatile __u16 *)(0x1401380a + KSEG1))
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#define ITE_GPCCR (*(volatile __u16 *)(0x14013812 + KSEG1))
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#define ITE_GPAICR (*(volatile __u16 *)(0x14013804 + KSEG1))
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#define ITE_GPBICR (*(volatile __u16 *)(0x1401380c + KSEG1))
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#define ITE_GPCICR (*(volatile __u16 *)(0x14013814 + KSEG1))
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#define ITE_GPAISR (*(volatile __u8 *)(0x14013806 + KSEG1))
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#define ITE_GPBISR (*(volatile __u8 *)(0x1401380e + KSEG1))
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#define ITE_GPCISR (*(volatile __u8 *)(0x14013816 + KSEG1))
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#define ITE_GCR (*(volatile __u8 *)(0x14013818 + KSEG1))
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#define MAX_GPIO_LINE 21
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static int ite_gpio_irq=IT8172_GPIO_IRQ;
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static long ite_irq_counter[MAX_GPIO_LINE];
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wait_queue_head_t ite_gpio_wait[MAX_GPIO_LINE];
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static int ite_gpio_irq_pending[MAX_GPIO_LINE];
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static int ite_gpio_debug=0;
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#define DEB(x) if (ite_gpio_debug>=1) x
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int ite_gpio_in(__u32 device, __u32 mask, volatile __u32 *data)
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{
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DEB(printk("ite_gpio_in mask=0x%x\n",mask));
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switch (device) {
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case ITE_GPIO_PORTA:
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ITE_GPACR = (__u16)mask; /* 0xffff */
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*data = ITE_GPADR;
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break;
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case ITE_GPIO_PORTB:
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ITE_GPBCR = (__u16)mask; /* 0xffff */
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*data = ITE_GPBDR;
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break;
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case ITE_GPIO_PORTC:
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ITE_GPCCR = (__u16)mask; /* 0x03ff */
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*data = ITE_GPCDR;
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break;
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default:
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return -EFAULT;
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}
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return 0;
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}
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int ite_gpio_out(__u32 device, __u32 mask, __u32 data)
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{
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switch (device) {
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case ITE_GPIO_PORTA:
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ITE_GPACR = (__u16)mask; /* 0x5555 */
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ITE_GPADR = (__u8)data;
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break;
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case ITE_GPIO_PORTB:
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ITE_GPBCR = (__u16)mask; /* 0x5555 */
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ITE_GPBDR = (__u8)data;
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break;
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case ITE_GPIO_PORTC:
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ITE_GPCCR = (__u16)mask; /* 0x0155 */
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ITE_GPCDR = (__u8)data;
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break;
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default:
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return -EFAULT;
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}
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return 0;
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}
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int ite_gpio_int_ctrl(__u32 device, __u32 mask, __u32 data)
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{
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switch (device) {
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case ITE_GPIO_PORTA:
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ITE_GPAICR = (ITE_GPAICR & ~mask) | (data & mask);
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break;
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case ITE_GPIO_PORTB:
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ITE_GPBICR = (ITE_GPBICR & ~mask) | (data & mask);
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break;
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case ITE_GPIO_PORTC:
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ITE_GPCICR = (ITE_GPCICR & ~mask) | (data & mask);
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break;
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default:
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return -EFAULT;
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}
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return 0;
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}
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int ite_gpio_in_status(__u32 device, __u32 mask, volatile __u32 *data)
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{
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int ret=-1;
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if ((MAX_GPIO_LINE > *data) && (*data >= 0))
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ret=ite_gpio_irq_pending[*data];
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DEB(printk("ite_gpio_in_status %d ret=%d\n",*data, ret));
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switch (device) {
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case ITE_GPIO_PORTA:
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*data = ITE_GPAISR & mask;
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break;
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case ITE_GPIO_PORTB:
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*data = ITE_GPBISR & mask;
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break;
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case ITE_GPIO_PORTC:
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*data = ITE_GPCISR & mask;
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break;
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default:
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return -EFAULT;
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}
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return ret;
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}
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int ite_gpio_out_status(__u32 device, __u32 mask, __u32 data)
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{
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switch (device) {
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case ITE_GPIO_PORTA:
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ITE_GPAISR = (ITE_GPAISR & ~mask) | (data & mask);
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break;
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case ITE_GPIO_PORTB:
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ITE_GPBISR = (ITE_GPBISR & ~mask) | (data & mask);
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break;
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case ITE_GPIO_PORTC:
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ITE_GPCISR = (ITE_GPCISR & ~mask) | (data & mask);
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break;
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default:
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return -EFAULT;
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}
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return 0;
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}
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int ite_gpio_gen_ctrl(__u32 device, __u32 mask, __u32 data)
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{
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ITE_GCR = (ITE_GCR & ~mask) | (data & mask);
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return 0;
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}
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int ite_gpio_int_wait (__u32 device, __u32 mask, __u32 data)
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{
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int i,line=0, ret=0;
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unsigned long flags;
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switch (device) {
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case ITE_GPIO_PORTA:
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line = data & mask;
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break;
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case ITE_GPIO_PORTB:
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line = (data & mask) <<8;
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break;
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case ITE_GPIO_PORTC:
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line = (data & mask) <<16;
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break;
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}
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for (i=MAX_GPIO_LINE-1; i >= 0; i--) {
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if ( (line) & (1 << i))
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break;
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}
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DEB(printk("wait device=0x%d mask=0x%x data=0x%x index %d\n",
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device, mask, data, i));
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if (line & ~(1<<i))
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return -EFAULT;
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if (ite_gpio_irq_pending[i]==1)
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return -EFAULT;
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save_flags (flags);
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cli();
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ite_gpio_irq_pending[i] = 1;
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ret = interruptible_sleep_on_timeout(&ite_gpio_wait[i], 3*HZ);
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restore_flags (flags);
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ite_gpio_irq_pending[i] = 0;
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return ret;
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}
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EXPORT_SYMBOL(ite_gpio_in);
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EXPORT_SYMBOL(ite_gpio_out);
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EXPORT_SYMBOL(ite_gpio_int_ctrl);
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EXPORT_SYMBOL(ite_gpio_in_status);
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EXPORT_SYMBOL(ite_gpio_out_status);
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EXPORT_SYMBOL(ite_gpio_gen_ctrl);
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EXPORT_SYMBOL(ite_gpio_int_wait);
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static int ite_gpio_open(struct inode *inode, struct file *file)
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{
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return 0;
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}
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static int ite_gpio_release(struct inode *inode, struct file *file)
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{
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return 0;
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}
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static int ite_gpio_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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static struct ite_gpio_ioctl_data ioctl_data;
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if (copy_from_user(&ioctl_data, (struct ite_gpio_ioctl_data *)arg,
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sizeof(ioctl_data)))
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return -EFAULT;
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if ((ioctl_data.device < ITE_GPIO_PORTA) ||
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(ioctl_data.device > ITE_GPIO_PORTC) )
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return -EFAULT;
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switch(cmd) {
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case ITE_GPIO_IN:
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if (ite_gpio_in(ioctl_data.device, ioctl_data.mask,
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&ioctl_data.data))
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return -EFAULT;
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if (copy_to_user((struct ite_gpio_ioctl_data *)arg,
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&ioctl_data, sizeof(ioctl_data)))
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return -EFAULT;
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break;
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case ITE_GPIO_OUT:
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return ite_gpio_out(ioctl_data.device,
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ioctl_data.mask, ioctl_data.data);
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break;
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case ITE_GPIO_INT_CTRL:
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return ite_gpio_int_ctrl(ioctl_data.device,
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ioctl_data.mask, ioctl_data.data);
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break;
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case ITE_GPIO_IN_STATUS:
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if (ite_gpio_in_status(ioctl_data.device, ioctl_data.mask,
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&ioctl_data.data))
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return -EFAULT;
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if (copy_to_user((struct ite_gpio_ioctl_data *)arg,
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&ioctl_data, sizeof(ioctl_data)))
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return -EFAULT;
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break;
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case ITE_GPIO_OUT_STATUS:
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return ite_gpio_out_status(ioctl_data.device,
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ioctl_data.mask, ioctl_data.data);
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break;
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case ITE_GPIO_GEN_CTRL:
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return ite_gpio_gen_ctrl(ioctl_data.device,
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ioctl_data.mask, ioctl_data.data);
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break;
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case ITE_GPIO_INT_WAIT:
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return ite_gpio_int_wait(ioctl_data.device,
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ioctl_data.mask, ioctl_data.data);
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break;
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default:
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return -ENOIOCTLCMD;
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}
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return 0;
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}
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static void ite_gpio_irq_handler(int this_irq, void *dev_id,
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struct pt_regs *regs)
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{
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int i,line;
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line = ITE_GPCISR & 0x1f;
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for (i=4; i >=0; i--) {
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if ( line & (1 << i)) {
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++ite_irq_counter[i+16];
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ite_gpio_irq_pending[i+16] = 2;
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wake_up_interruptible(&ite_gpio_wait[i+16]);
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DEB(printk("interrupt 0x%x %d\n", &ite_gpio_wait[i+16], i+16));
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ITE_GPCISR = ITE_GPCISR & (1<<i);
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return;
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}
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}
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line = ITE_GPBISR;
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for (i=7; i >= 0; i--) {
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if ( line & (1 << i)) {
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++ite_irq_counter[i+8];
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ite_gpio_irq_pending[i+8] = 2;
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wake_up_interruptible(&ite_gpio_wait[i+8]);
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DEB(printk("interrupt 0x%x %d\n",ITE_GPBISR, i+8));
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ITE_GPBISR = ITE_GPBISR & (1<<i);
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return;
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}
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}
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line = ITE_GPAISR;
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for (i=7; i >= 0; i--) {
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if ( line & (1 << i)) {
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++ite_irq_counter[i];
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ite_gpio_irq_pending[i] = 2;
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wake_up_interruptible(&ite_gpio_wait[i]);
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DEB(printk("interrupt 0x%x %d\n",ITE_GPAISR, i));
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ITE_GPAISR = ITE_GPAISR & (1<<i);
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return;
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}
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}
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}
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static struct file_operations ite_gpio_fops = {
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.owner = THIS_MODULE,
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.ioctl = ite_gpio_ioctl,
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.open = ite_gpio_open,
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.release = ite_gpio_release,
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};
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static struct miscdevice ite_gpio_miscdev = {
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MISC_DYNAMIC_MINOR,
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"ite_gpio",
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&ite_gpio_fops
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};
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int __init ite_gpio_init(void)
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{
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int i;
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if (misc_register(&ite_gpio_miscdev))
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return -ENODEV;
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if (!request_region(ite_gpio_base, 0x1c, "ITE GPIO"))
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{
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misc_deregister(&ite_gpio_miscdev);
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return -EIO;
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}
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/* initialize registers */
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ITE_GPACR = 0xffff;
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ITE_GPBCR = 0xffff;
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ITE_GPCCR = 0xffff;
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ITE_GPAICR = 0x00ff;
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ITE_GPBICR = 0x00ff;
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ITE_GPCICR = 0x00ff;
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ITE_GCR = 0;
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for (i = 0; i < MAX_GPIO_LINE; i++) {
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ite_gpio_irq_pending[i]=0;
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init_waitqueue_head(&ite_gpio_wait[i]);
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}
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if (request_irq(ite_gpio_irq, ite_gpio_irq_handler, SA_SHIRQ, "gpio", 0) < 0) {
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misc_deregister(&ite_gpio_miscdev);
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release_region(ite_gpio_base, 0x1c);
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return 0;
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}
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printk("GPIO at 0x%x (irq = %d)\n", ite_gpio_base, ite_gpio_irq);
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return 0;
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}
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static void __exit ite_gpio_exit(void)
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{
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misc_deregister(&ite_gpio_miscdev);
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}
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module_init(ite_gpio_init);
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module_exit(ite_gpio_exit);
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MODULE_LICENSE("GPL");
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