342 lines
9.0 KiB
C
342 lines
9.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Mellanox watchdog driver
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*
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* Copyright (C) 2019 Mellanox Technologies
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* Copyright (C) 2019 Michael Shych <mshych@mellanox.com>
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/log2.h>
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#include <linux/module.h>
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#include <linux/platform_data/mlxreg.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#define MLXREG_WDT_CLOCK_SCALE 1000
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#define MLXREG_WDT_MAX_TIMEOUT_TYPE1 32
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#define MLXREG_WDT_MAX_TIMEOUT_TYPE2 255
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#define MLXREG_WDT_MAX_TIMEOUT_TYPE3 65535
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#define MLXREG_WDT_MIN_TIMEOUT 1
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#define MLXREG_WDT_OPTIONS_BASE (WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | \
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WDIOF_SETTIMEOUT)
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/**
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* struct mlxreg_wdt - wd private data:
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*
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* @wdd: watchdog device;
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* @device: basic device;
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* @pdata: data received from platform driver;
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* @regmap: register map of parent device;
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* @timeout: defined timeout in sec.;
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* @action_idx: index for direct access to action register;
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* @timeout_idx:index for direct access to TO register;
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* @tleft_idx: index for direct access to time left register;
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* @ping_idx: index for direct access to ping register;
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* @reset_idx: index for direct access to reset cause register;
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* @wd_type: watchdog HW type;
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*/
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struct mlxreg_wdt {
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struct watchdog_device wdd;
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struct mlxreg_core_platform_data *pdata;
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void *regmap;
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int action_idx;
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int timeout_idx;
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int tleft_idx;
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int ping_idx;
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int reset_idx;
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int regmap_val_sz;
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enum mlxreg_wdt_type wdt_type;
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};
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static void mlxreg_wdt_check_card_reset(struct mlxreg_wdt *wdt)
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{
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struct mlxreg_core_data *reg_data;
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u32 regval;
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int rc;
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if (wdt->reset_idx == -EINVAL)
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return;
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if (!(wdt->wdd.info->options & WDIOF_CARDRESET))
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return;
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reg_data = &wdt->pdata->data[wdt->reset_idx];
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rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
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if (!rc) {
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if (regval & ~reg_data->mask) {
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wdt->wdd.bootstatus = WDIOF_CARDRESET;
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dev_info(wdt->wdd.parent,
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"watchdog previously reset the CPU\n");
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}
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}
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}
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static int mlxreg_wdt_start(struct watchdog_device *wdd)
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{
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struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
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struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx];
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return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
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BIT(reg_data->bit));
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}
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static int mlxreg_wdt_stop(struct watchdog_device *wdd)
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{
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struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
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struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx];
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return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
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~BIT(reg_data->bit));
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}
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static int mlxreg_wdt_ping(struct watchdog_device *wdd)
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{
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struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
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struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->ping_idx];
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return regmap_update_bits_base(wdt->regmap, reg_data->reg,
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~reg_data->mask, BIT(reg_data->bit),
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NULL, false, true);
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}
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static int mlxreg_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int timeout)
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{
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struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
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struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->timeout_idx];
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u32 regval, set_time, hw_timeout;
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int rc;
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switch (wdt->wdt_type) {
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case MLX_WDT_TYPE1:
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rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
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if (rc)
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return rc;
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hw_timeout = order_base_2(timeout * MLXREG_WDT_CLOCK_SCALE);
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regval = (regval & reg_data->mask) | hw_timeout;
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/* Rowndown to actual closest number of sec. */
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set_time = BIT(hw_timeout) / MLXREG_WDT_CLOCK_SCALE;
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rc = regmap_write(wdt->regmap, reg_data->reg, regval);
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break;
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case MLX_WDT_TYPE2:
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set_time = timeout;
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rc = regmap_write(wdt->regmap, reg_data->reg, timeout);
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break;
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case MLX_WDT_TYPE3:
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/* WD_TYPE3 has 2B set time register */
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set_time = timeout;
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if (wdt->regmap_val_sz == 1) {
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regval = timeout & 0xff;
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rc = regmap_write(wdt->regmap, reg_data->reg, regval);
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if (!rc) {
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regval = (timeout & 0xff00) >> 8;
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rc = regmap_write(wdt->regmap,
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reg_data->reg + 1, regval);
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}
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} else {
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rc = regmap_write(wdt->regmap, reg_data->reg, timeout);
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}
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break;
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default:
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return -EINVAL;
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}
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wdd->timeout = set_time;
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if (!rc) {
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/*
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* Restart watchdog with new timeout period
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* if watchdog is already started.
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*/
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if (watchdog_active(wdd)) {
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rc = mlxreg_wdt_stop(wdd);
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if (!rc)
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rc = mlxreg_wdt_start(wdd);
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}
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}
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return rc;
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}
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static unsigned int mlxreg_wdt_get_timeleft(struct watchdog_device *wdd)
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{
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struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
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struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->tleft_idx];
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u32 regval, msb, lsb;
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int rc;
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if (wdt->wdt_type == MLX_WDT_TYPE2) {
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rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
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} else {
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/* WD_TYPE3 has 2 byte timeleft register */
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if (wdt->regmap_val_sz == 1) {
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rc = regmap_read(wdt->regmap, reg_data->reg, &lsb);
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if (!rc) {
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rc = regmap_read(wdt->regmap,
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reg_data->reg + 1, &msb);
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regval = (msb & 0xff) << 8 | (lsb & 0xff);
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}
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} else {
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rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
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}
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}
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/* Return 0 timeleft in case of failure register read. */
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return rc == 0 ? regval : 0;
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}
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static const struct watchdog_ops mlxreg_wdt_ops_type1 = {
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.start = mlxreg_wdt_start,
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.stop = mlxreg_wdt_stop,
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.ping = mlxreg_wdt_ping,
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.set_timeout = mlxreg_wdt_set_timeout,
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.owner = THIS_MODULE,
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};
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static const struct watchdog_ops mlxreg_wdt_ops_type2 = {
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.start = mlxreg_wdt_start,
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.stop = mlxreg_wdt_stop,
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.ping = mlxreg_wdt_ping,
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.set_timeout = mlxreg_wdt_set_timeout,
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.get_timeleft = mlxreg_wdt_get_timeleft,
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.owner = THIS_MODULE,
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};
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static const struct watchdog_info mlxreg_wdt_main_info = {
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.options = MLXREG_WDT_OPTIONS_BASE
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| WDIOF_CARDRESET,
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.identity = "mlx-wdt-main",
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};
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static const struct watchdog_info mlxreg_wdt_aux_info = {
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.options = MLXREG_WDT_OPTIONS_BASE
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| WDIOF_ALARMONLY,
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.identity = "mlx-wdt-aux",
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};
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static void mlxreg_wdt_config(struct mlxreg_wdt *wdt,
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struct mlxreg_core_platform_data *pdata)
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{
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struct mlxreg_core_data *data = pdata->data;
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int i;
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wdt->reset_idx = -EINVAL;
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for (i = 0; i < pdata->counter; i++, data++) {
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if (strnstr(data->label, "action", sizeof(data->label)))
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wdt->action_idx = i;
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else if (strnstr(data->label, "timeout", sizeof(data->label)))
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wdt->timeout_idx = i;
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else if (strnstr(data->label, "timeleft", sizeof(data->label)))
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wdt->tleft_idx = i;
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else if (strnstr(data->label, "ping", sizeof(data->label)))
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wdt->ping_idx = i;
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else if (strnstr(data->label, "reset", sizeof(data->label)))
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wdt->reset_idx = i;
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}
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wdt->pdata = pdata;
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if (strnstr(pdata->identity, mlxreg_wdt_main_info.identity,
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sizeof(mlxreg_wdt_main_info.identity)))
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wdt->wdd.info = &mlxreg_wdt_main_info;
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else
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wdt->wdd.info = &mlxreg_wdt_aux_info;
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wdt->wdt_type = pdata->version;
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switch (wdt->wdt_type) {
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case MLX_WDT_TYPE1:
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wdt->wdd.ops = &mlxreg_wdt_ops_type1;
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wdt->wdd.max_timeout = MLXREG_WDT_MAX_TIMEOUT_TYPE1;
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break;
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case MLX_WDT_TYPE2:
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wdt->wdd.ops = &mlxreg_wdt_ops_type2;
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wdt->wdd.max_timeout = MLXREG_WDT_MAX_TIMEOUT_TYPE2;
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break;
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case MLX_WDT_TYPE3:
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wdt->wdd.ops = &mlxreg_wdt_ops_type2;
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wdt->wdd.max_timeout = MLXREG_WDT_MAX_TIMEOUT_TYPE3;
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break;
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default:
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break;
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}
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wdt->wdd.min_timeout = MLXREG_WDT_MIN_TIMEOUT;
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}
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static int mlxreg_wdt_init_timeout(struct mlxreg_wdt *wdt,
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struct mlxreg_core_platform_data *pdata)
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{
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u32 timeout;
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timeout = pdata->data[wdt->timeout_idx].health_cntr;
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return mlxreg_wdt_set_timeout(&wdt->wdd, timeout);
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}
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static int mlxreg_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct mlxreg_core_platform_data *pdata;
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struct mlxreg_wdt *wdt;
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int rc;
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pdata = dev_get_platdata(dev);
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if (!pdata) {
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dev_err(dev, "Failed to get platform data.\n");
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return -EINVAL;
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}
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wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
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if (!wdt)
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return -ENOMEM;
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wdt->wdd.parent = dev;
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wdt->regmap = pdata->regmap;
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rc = regmap_get_val_bytes(wdt->regmap);
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if (rc < 0)
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return -EINVAL;
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wdt->regmap_val_sz = rc;
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mlxreg_wdt_config(wdt, pdata);
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if ((pdata->features & MLXREG_CORE_WD_FEATURE_NOWAYOUT))
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watchdog_set_nowayout(&wdt->wdd, WATCHDOG_NOWAYOUT);
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watchdog_stop_on_reboot(&wdt->wdd);
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watchdog_stop_on_unregister(&wdt->wdd);
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watchdog_set_drvdata(&wdt->wdd, wdt);
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rc = mlxreg_wdt_init_timeout(wdt, pdata);
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if (rc)
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goto register_error;
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if ((pdata->features & MLXREG_CORE_WD_FEATURE_START_AT_BOOT)) {
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rc = mlxreg_wdt_start(&wdt->wdd);
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if (rc)
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goto register_error;
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set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
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}
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mlxreg_wdt_check_card_reset(wdt);
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rc = devm_watchdog_register_device(dev, &wdt->wdd);
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register_error:
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if (rc)
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dev_err(dev, "Cannot register watchdog device (err=%d)\n", rc);
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return rc;
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}
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static struct platform_driver mlxreg_wdt_driver = {
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.probe = mlxreg_wdt_probe,
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.driver = {
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.name = "mlx-wdt",
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},
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};
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module_platform_driver(mlxreg_wdt_driver);
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MODULE_AUTHOR("Michael Shych <michaelsh@mellanox.com>");
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MODULE_DESCRIPTION("Mellanox watchdog driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:mlx-wdt");
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