252 lines
6.0 KiB
C
252 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014, The Linux foundation. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#include <dt-bindings/soc/qcom,gsbi.h>
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#define GSBI_CTRL_REG 0x0000
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#define GSBI_PROTOCOL_SHIFT 4
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#define MAX_GSBI 12
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#define TCSR_ADM_CRCI_BASE 0x70
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struct crci_config {
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u32 num_rows;
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const u32 (*array)[MAX_GSBI];
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};
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static const u32 crci_ipq8064[][MAX_GSBI] = {
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{
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000c00, 0x003000, 0x00c000,
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0x030000, 0x0c0000, 0x300000, 0xc00000
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},
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{
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000c00, 0x003000, 0x00c000,
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0x030000, 0x0c0000, 0x300000, 0xc00000
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},
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};
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static const struct crci_config config_ipq8064 = {
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.num_rows = ARRAY_SIZE(crci_ipq8064),
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.array = crci_ipq8064,
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};
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static const unsigned int crci_apq8064[][MAX_GSBI] = {
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{
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0x001800, 0x006000, 0x000030, 0x0000c0,
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0x000300, 0x000400, 0x000000, 0x000000,
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0x000000, 0x000000, 0x000000, 0x000000
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},
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{
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0x000000, 0x000000, 0x000000, 0x000000,
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0x000000, 0x000020, 0x0000c0, 0x000000,
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0x000000, 0x000000, 0x000000, 0x000000
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},
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};
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static const struct crci_config config_apq8064 = {
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.num_rows = ARRAY_SIZE(crci_apq8064),
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.array = crci_apq8064,
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};
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static const unsigned int crci_msm8960[][MAX_GSBI] = {
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{
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000400, 0x000000, 0x000000,
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0x000000, 0x000000, 0x000000, 0x000000
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},
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{
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0x000000, 0x000000, 0x000000, 0x000000,
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0x000000, 0x000020, 0x0000c0, 0x000300,
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0x001800, 0x006000, 0x000000, 0x000000
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},
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};
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static const struct crci_config config_msm8960 = {
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.num_rows = ARRAY_SIZE(crci_msm8960),
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.array = crci_msm8960,
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};
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static const unsigned int crci_msm8660[][MAX_GSBI] = {
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{ /* ADM 0 - B */
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000c00, 0x003000, 0x00c000,
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0x030000, 0x0c0000, 0x300000, 0xc00000
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},
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{ /* ADM 0 - B */
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000c00, 0x003000, 0x00c000,
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0x030000, 0x0c0000, 0x300000, 0xc00000
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},
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{ /* ADM 1 - A */
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000c00, 0x003000, 0x00c000,
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0x030000, 0x0c0000, 0x300000, 0xc00000
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},
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{ /* ADM 1 - B */
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0x000003, 0x00000c, 0x000030, 0x0000c0,
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0x000300, 0x000c00, 0x003000, 0x00c000,
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0x030000, 0x0c0000, 0x300000, 0xc00000
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},
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};
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static const struct crci_config config_msm8660 = {
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.num_rows = ARRAY_SIZE(crci_msm8660),
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.array = crci_msm8660,
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};
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struct gsbi_info {
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struct clk *hclk;
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u32 mode;
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u32 crci;
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struct regmap *tcsr;
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};
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static const struct of_device_id tcsr_dt_match[] = {
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{ .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
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{ .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
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{ .compatible = "qcom,tcsr-msm8960", .data = &config_msm8960},
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{ .compatible = "qcom,tcsr-msm8660", .data = &config_msm8660},
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{ },
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};
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static int gsbi_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct device_node *tcsr_node;
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const struct of_device_id *match;
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struct resource *res;
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void __iomem *base;
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struct gsbi_info *gsbi;
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int i, ret;
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u32 mask, gsbi_num;
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const struct crci_config *config = NULL;
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gsbi = devm_kzalloc(&pdev->dev, sizeof(*gsbi), GFP_KERNEL);
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if (!gsbi)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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/* get the tcsr node and setup the config and regmap */
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gsbi->tcsr = syscon_regmap_lookup_by_phandle(node, "syscon-tcsr");
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if (!IS_ERR(gsbi->tcsr)) {
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tcsr_node = of_parse_phandle(node, "syscon-tcsr", 0);
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if (tcsr_node) {
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match = of_match_node(tcsr_dt_match, tcsr_node);
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if (match)
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config = match->data;
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else
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dev_warn(&pdev->dev, "no matching TCSR\n");
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of_node_put(tcsr_node);
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}
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}
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if (of_property_read_u32(node, "cell-index", &gsbi_num)) {
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dev_err(&pdev->dev, "missing cell-index\n");
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return -EINVAL;
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}
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if (gsbi_num < 1 || gsbi_num > MAX_GSBI) {
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dev_err(&pdev->dev, "invalid cell-index\n");
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return -EINVAL;
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}
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if (of_property_read_u32(node, "qcom,mode", &gsbi->mode)) {
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dev_err(&pdev->dev, "missing mode configuration\n");
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return -EINVAL;
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}
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/* not required, so default to 0 if not present */
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of_property_read_u32(node, "qcom,crci", &gsbi->crci);
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dev_info(&pdev->dev, "GSBI port protocol: %d crci: %d\n",
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gsbi->mode, gsbi->crci);
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gsbi->hclk = devm_clk_get(&pdev->dev, "iface");
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if (IS_ERR(gsbi->hclk))
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return PTR_ERR(gsbi->hclk);
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clk_prepare_enable(gsbi->hclk);
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writel_relaxed((gsbi->mode << GSBI_PROTOCOL_SHIFT) | gsbi->crci,
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base + GSBI_CTRL_REG);
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/*
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* modify tcsr to reflect mode and ADM CRCI mux
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* Each gsbi contains a pair of bits, one for RX and one for TX
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* SPI mode requires both bits cleared, otherwise they are set
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*/
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if (config) {
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for (i = 0; i < config->num_rows; i++) {
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mask = config->array[i][gsbi_num - 1];
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if (gsbi->mode == GSBI_PROT_SPI)
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regmap_update_bits(gsbi->tcsr,
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TCSR_ADM_CRCI_BASE + 4 * i, mask, 0);
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else
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regmap_update_bits(gsbi->tcsr,
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TCSR_ADM_CRCI_BASE + 4 * i, mask, mask);
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}
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}
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/* make sure the gsbi control write is not reordered */
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wmb();
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platform_set_drvdata(pdev, gsbi);
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ret = of_platform_populate(node, NULL, NULL, &pdev->dev);
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if (ret)
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clk_disable_unprepare(gsbi->hclk);
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return ret;
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}
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static int gsbi_remove(struct platform_device *pdev)
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{
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struct gsbi_info *gsbi = platform_get_drvdata(pdev);
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clk_disable_unprepare(gsbi->hclk);
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return 0;
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}
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static const struct of_device_id gsbi_dt_match[] = {
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{ .compatible = "qcom,gsbi-v1.0.0", },
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{ },
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};
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MODULE_DEVICE_TABLE(of, gsbi_dt_match);
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static struct platform_driver gsbi_driver = {
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.driver = {
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.name = "gsbi",
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.of_match_table = gsbi_dt_match,
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},
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.probe = gsbi_probe,
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.remove = gsbi_remove,
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};
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module_platform_driver(gsbi_driver);
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MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
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MODULE_DESCRIPTION("QCOM GSBI driver");
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MODULE_LICENSE("GPL v2");
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