of F15h models don't support it.
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Merge tag 'amd-thresholding-fixes-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/mce
- make the APIC LVT interrupt optional because a subset
of AMD F15h models don't support it.
Signed-off-by: Ingo Molnar <mingo@kernel.org>