58eefe2f3f
Testing has shown that the TS-pin's bias-current needs to be disabled when reading the GPIO0 pin in GPADC mode. It seems that there is only 1 bias current source and to be able to use it for the GPIO0 pin in GPADC mode it must be temporarily turned off for the TS pin, but the datasheet does not mention this. This commit adds the necessary writes to turn the TS pin BIAS current off before and back on after reading the GPADC. This fixes the GPADC always returning a reading of 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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intel_pmic.c | ||
intel_pmic.h | ||
intel_pmic_bxtwc.c | ||
intel_pmic_chtwc.c | ||
intel_pmic_crc.c | ||
intel_pmic_xpower.c |