746 lines
24 KiB
C
746 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2019 MediaTek Inc.
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#include <linux/mfd/mt6358/registers.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/mt6358-regulator.h>
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#include <linux/regulator/of_regulator.h>
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#define MT6358_BUCK_MODE_AUTO 0
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#define MT6358_BUCK_MODE_FORCE_PWM 1
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/*
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* MT6358 regulators' information
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*
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* @desc: standard fields of regulator description.
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* @qi: Mask for query enable signal status of regulators
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*/
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struct mt6358_regulator_info {
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struct regulator_desc desc;
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u32 status_reg;
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u32 qi;
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const u32 *index_table;
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unsigned int n_table;
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u32 da_vsel_reg;
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u32 da_vsel_mask;
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u32 modeset_reg;
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u32 modeset_mask;
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};
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#define MT6358_BUCK(match, vreg, min, max, step, \
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volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \
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_modeset_reg, _modeset_shift) \
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[MT6358_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6358_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_BUCK_##vreg##_CON0, \
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.enable_mask = BIT(0), \
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.of_map_mode = mt6358_map_mode, \
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}, \
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.status_reg = MT6358_BUCK_##vreg##_DBG1, \
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.qi = BIT(0), \
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.da_vsel_reg = _da_vsel_reg, \
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.da_vsel_mask = _da_vsel_mask, \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = BIT(_modeset_shift), \
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}
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#define MT6358_LDO(match, vreg, ldo_volt_table, \
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ldo_index_table, enreg, enbit, vosel, \
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vosel_mask) \
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[MT6358_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_table_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6358_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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}, \
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.status_reg = MT6358_LDO_##vreg##_CON1, \
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.qi = BIT(15), \
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.index_table = ldo_index_table, \
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.n_table = ARRAY_SIZE(ldo_index_table), \
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}
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#define MT6358_LDO1(match, vreg, min, max, step, \
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volt_ranges, _da_vsel_reg, _da_vsel_mask, \
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vosel, vosel_mask) \
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[MT6358_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6358_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_LDO_##vreg##_CON0, \
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.enable_mask = BIT(0), \
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}, \
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.da_vsel_reg = _da_vsel_reg, \
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.da_vsel_mask = _da_vsel_mask, \
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.status_reg = MT6358_LDO_##vreg##_DBG1, \
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.qi = BIT(0), \
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}
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#define MT6358_REG_FIXED(match, vreg, \
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enreg, enbit, volt) \
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[MT6358_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_fixed_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6358_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = 1, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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.min_uV = volt, \
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}, \
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.status_reg = MT6358_LDO_##vreg##_CON1, \
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.qi = BIT(15), \
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}
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#define MT6366_BUCK(match, vreg, min, max, step, \
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volt_ranges, vosel_mask, _da_vsel_reg, _da_vsel_mask, \
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_modeset_reg, _modeset_shift) \
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[MT6366_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6366_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = MT6358_BUCK_##vreg##_ELR0, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_BUCK_##vreg##_CON0, \
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.enable_mask = BIT(0), \
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.of_map_mode = mt6358_map_mode, \
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}, \
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.status_reg = MT6358_BUCK_##vreg##_DBG1, \
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.qi = BIT(0), \
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.da_vsel_reg = _da_vsel_reg, \
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.da_vsel_mask = _da_vsel_mask, \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = BIT(_modeset_shift), \
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}
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#define MT6366_LDO(match, vreg, ldo_volt_table, \
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ldo_index_table, enreg, enbit, vosel, \
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vosel_mask) \
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[MT6366_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_table_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6366_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ARRAY_SIZE(ldo_volt_table), \
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.volt_table = ldo_volt_table, \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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}, \
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.status_reg = MT6358_LDO_##vreg##_CON1, \
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.qi = BIT(15), \
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.index_table = ldo_index_table, \
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.n_table = ARRAY_SIZE(ldo_index_table), \
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}
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#define MT6366_LDO1(match, vreg, min, max, step, \
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volt_ranges, _da_vsel_reg, _da_vsel_mask, \
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vosel, vosel_mask) \
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[MT6366_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_range_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6366_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = ((max) - (min)) / (step) + 1, \
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.linear_ranges = volt_ranges, \
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.n_linear_ranges = ARRAY_SIZE(volt_ranges), \
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.vsel_reg = vosel, \
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.vsel_mask = vosel_mask, \
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.enable_reg = MT6358_LDO_##vreg##_CON0, \
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.enable_mask = BIT(0), \
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}, \
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.da_vsel_reg = _da_vsel_reg, \
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.da_vsel_mask = _da_vsel_mask, \
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.status_reg = MT6358_LDO_##vreg##_DBG1, \
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.qi = BIT(0), \
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}
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#define MT6366_REG_FIXED(match, vreg, \
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enreg, enbit, volt) \
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[MT6366_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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.of_match = of_match_ptr(match), \
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.ops = &mt6358_volt_fixed_ops, \
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.type = REGULATOR_VOLTAGE, \
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.id = MT6366_ID_##vreg, \
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.owner = THIS_MODULE, \
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.n_voltages = 1, \
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.enable_reg = enreg, \
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.enable_mask = BIT(enbit), \
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.min_uV = volt, \
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}, \
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.status_reg = MT6358_LDO_##vreg##_CON1, \
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.qi = BIT(15), \
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}
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static const struct linear_range buck_volt_range1[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 6250),
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};
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static const struct linear_range buck_volt_range2[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x7f, 12500),
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};
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static const struct linear_range buck_volt_range3[] = {
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REGULATOR_LINEAR_RANGE(500000, 0, 0x3f, 50000),
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};
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static const struct linear_range buck_volt_range4[] = {
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REGULATOR_LINEAR_RANGE(1000000, 0, 0x7f, 12500),
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};
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static const unsigned int vdram2_voltages[] = {
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600000, 1800000,
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};
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static const unsigned int vsim_voltages[] = {
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1700000, 1800000, 2700000, 3000000, 3100000,
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};
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static const unsigned int vibr_voltages[] = {
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1200000, 1300000, 1500000, 1800000,
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2000000, 2800000, 3000000, 3300000,
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};
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static const unsigned int vusb_voltages[] = {
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3000000, 3100000,
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};
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static const unsigned int vcamd_voltages[] = {
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900000, 1000000, 1100000, 1200000,
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1300000, 1500000, 1800000,
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};
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static const unsigned int vefuse_voltages[] = {
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1700000, 1800000, 1900000,
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};
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static const unsigned int vmch_vemc_voltages[] = {
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2900000, 3000000, 3300000,
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};
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static const unsigned int vcama_voltages[] = {
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1800000, 2500000, 2700000,
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2800000, 2900000, 3000000,
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};
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static const unsigned int vcn33_bt_wifi_voltages[] = {
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3300000, 3400000, 3500000,
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};
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static const unsigned int vmc_voltages[] = {
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1800000, 2900000, 3000000, 3300000,
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};
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static const unsigned int vldo28_voltages[] = {
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2800000, 3000000,
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};
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static const u32 vdram2_idx[] = {
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0, 12,
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};
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static const u32 vsim_idx[] = {
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3, 4, 8, 11, 12,
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};
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static const u32 vibr_idx[] = {
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0, 1, 2, 4, 5, 9, 11, 13,
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};
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static const u32 vusb_idx[] = {
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3, 4,
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};
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static const u32 vcamd_idx[] = {
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3, 4, 5, 6, 7, 9, 12,
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};
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static const u32 vefuse_idx[] = {
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11, 12, 13,
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};
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static const u32 vmch_vemc_idx[] = {
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2, 3, 5,
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};
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static const u32 vcama_idx[] = {
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0, 7, 9, 10, 11, 12,
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};
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static const u32 vcn33_bt_wifi_idx[] = {
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1, 2, 3,
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};
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static const u32 vmc_idx[] = {
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4, 10, 11, 13,
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};
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static const u32 vldo28_idx[] = {
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1, 3,
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};
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static unsigned int mt6358_map_mode(unsigned int mode)
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{
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return mode == MT6358_BUCK_MODE_AUTO ?
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REGULATOR_MODE_NORMAL : REGULATOR_MODE_FAST;
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}
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static int mt6358_set_voltage_sel(struct regulator_dev *rdev,
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unsigned int selector)
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{
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int idx, ret;
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const u32 *pvol;
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struct mt6358_regulator_info *info = rdev_get_drvdata(rdev);
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pvol = info->index_table;
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idx = pvol[selector];
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idx <<= ffs(info->desc.vsel_mask) - 1;
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ret = regmap_update_bits(rdev->regmap, info->desc.vsel_reg,
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info->desc.vsel_mask, idx);
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return ret;
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}
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static int mt6358_get_voltage_sel(struct regulator_dev *rdev)
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{
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int idx, ret;
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u32 selector;
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struct mt6358_regulator_info *info = rdev_get_drvdata(rdev);
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const u32 *pvol;
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ret = regmap_read(rdev->regmap, info->desc.vsel_reg, &selector);
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if (ret != 0) {
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dev_info(&rdev->dev,
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"Failed to get mt6358 %s vsel reg: %d\n",
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info->desc.name, ret);
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return ret;
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}
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selector = (selector & info->desc.vsel_mask) >>
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(ffs(info->desc.vsel_mask) - 1);
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pvol = info->index_table;
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for (idx = 0; idx < info->desc.n_voltages; idx++) {
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if (pvol[idx] == selector)
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return idx;
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}
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return -EINVAL;
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}
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static int mt6358_get_buck_voltage_sel(struct regulator_dev *rdev)
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{
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int ret, regval;
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struct mt6358_regulator_info *info = rdev_get_drvdata(rdev);
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ret = regmap_read(rdev->regmap, info->da_vsel_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to get mt6358 Buck %s vsel reg: %d\n",
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info->desc.name, ret);
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return ret;
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}
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ret = (regval & info->da_vsel_mask) >> (ffs(info->da_vsel_mask) - 1);
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return ret;
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}
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static int mt6358_get_status(struct regulator_dev *rdev)
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{
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int ret;
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u32 regval;
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struct mt6358_regulator_info *info = rdev_get_drvdata(rdev);
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ret = regmap_read(rdev->regmap, info->status_reg, ®val);
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if (ret != 0) {
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dev_info(&rdev->dev, "Failed to get enable reg: %d\n", ret);
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return ret;
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}
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return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF;
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}
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static int mt6358_regulator_set_mode(struct regulator_dev *rdev,
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unsigned int mode)
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{
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struct mt6358_regulator_info *info = rdev_get_drvdata(rdev);
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int val;
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switch (mode) {
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case REGULATOR_MODE_FAST:
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val = MT6358_BUCK_MODE_FORCE_PWM;
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break;
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case REGULATOR_MODE_NORMAL:
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val = MT6358_BUCK_MODE_AUTO;
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break;
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default:
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return -EINVAL;
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}
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dev_dbg(&rdev->dev, "mt6358 buck set_mode %#x, %#x, %#x\n",
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info->modeset_reg, info->modeset_mask, val);
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val <<= ffs(info->modeset_mask) - 1;
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return regmap_update_bits(rdev->regmap, info->modeset_reg,
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info->modeset_mask, val);
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}
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static unsigned int mt6358_regulator_get_mode(struct regulator_dev *rdev)
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{
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struct mt6358_regulator_info *info = rdev_get_drvdata(rdev);
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int ret, regval;
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ret = regmap_read(rdev->regmap, info->modeset_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to get mt6358 buck mode: %d\n", ret);
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return ret;
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}
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switch ((regval & info->modeset_mask) >> (ffs(info->modeset_mask) - 1)) {
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case MT6358_BUCK_MODE_AUTO:
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return REGULATOR_MODE_NORMAL;
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case MT6358_BUCK_MODE_FORCE_PWM:
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return REGULATOR_MODE_FAST;
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default:
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return -EINVAL;
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}
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}
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static const struct regulator_ops mt6358_volt_range_ops = {
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.list_voltage = regulator_list_voltage_linear_range,
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.map_voltage = regulator_map_voltage_linear_range,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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.get_voltage_sel = mt6358_get_buck_voltage_sel,
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.set_voltage_time_sel = regulator_set_voltage_time_sel,
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.enable = regulator_enable_regmap,
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.disable = regulator_disable_regmap,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6358_get_status,
|
|
.set_mode = mt6358_regulator_set_mode,
|
|
.get_mode = mt6358_regulator_get_mode,
|
|
};
|
|
|
|
static const struct regulator_ops mt6358_volt_table_ops = {
|
|
.list_voltage = regulator_list_voltage_table,
|
|
.map_voltage = regulator_map_voltage_iterate,
|
|
.set_voltage_sel = mt6358_set_voltage_sel,
|
|
.get_voltage_sel = mt6358_get_voltage_sel,
|
|
.set_voltage_time_sel = regulator_set_voltage_time_sel,
|
|
.enable = regulator_enable_regmap,
|
|
.disable = regulator_disable_regmap,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6358_get_status,
|
|
};
|
|
|
|
static const struct regulator_ops mt6358_volt_fixed_ops = {
|
|
.list_voltage = regulator_list_voltage_linear,
|
|
.enable = regulator_enable_regmap,
|
|
.disable = regulator_disable_regmap,
|
|
.is_enabled = regulator_is_enabled_regmap,
|
|
.get_status = mt6358_get_status,
|
|
};
|
|
|
|
/* The array is indexed by id(MT6358_ID_XXX) */
|
|
static struct mt6358_regulator_info mt6358_regulators[] = {
|
|
MT6358_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500,
|
|
buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f,
|
|
MT6358_VDRAM1_ANA_CON0, 8),
|
|
MT6358_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f,
|
|
MT6358_VCORE_VGPU_ANA_CON0, 1),
|
|
MT6358_BUCK("buck_vcore_sshub", VCORE_SSHUB, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_SSHUB_ELR0, 0x7f,
|
|
MT6358_VCORE_VGPU_ANA_CON0, 1),
|
|
MT6358_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
|
|
buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f,
|
|
MT6358_VPA_ANA_CON0, 3),
|
|
MT6358_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f,
|
|
MT6358_VPROC_ANA_CON0, 1),
|
|
MT6358_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f,
|
|
MT6358_VPROC_ANA_CON0, 2),
|
|
MT6358_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f,
|
|
MT6358_VCORE_VGPU_ANA_CON0, 2),
|
|
MT6358_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
|
|
buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f,
|
|
MT6358_VS2_ANA_CON0, 8),
|
|
MT6358_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f,
|
|
MT6358_VMODEM_ANA_CON0, 8),
|
|
MT6358_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
|
|
buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f,
|
|
MT6358_VS1_ANA_CON0, 8),
|
|
MT6358_REG_FIXED("ldo_vrf12", VRF12,
|
|
MT6358_LDO_VRF12_CON0, 0, 1200000),
|
|
MT6358_REG_FIXED("ldo_vio18", VIO18,
|
|
MT6358_LDO_VIO18_CON0, 0, 1800000),
|
|
MT6358_REG_FIXED("ldo_vcamio", VCAMIO,
|
|
MT6358_LDO_VCAMIO_CON0, 0, 1800000),
|
|
MT6358_REG_FIXED("ldo_vcn18", VCN18, MT6358_LDO_VCN18_CON0, 0, 1800000),
|
|
MT6358_REG_FIXED("ldo_vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000),
|
|
MT6358_REG_FIXED("ldo_vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000),
|
|
MT6358_REG_FIXED("ldo_vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000),
|
|
MT6358_REG_FIXED("ldo_vaux18", VAUX18,
|
|
MT6358_LDO_VAUX18_CON0, 0, 1800000),
|
|
MT6358_REG_FIXED("ldo_vbif28", VBIF28,
|
|
MT6358_LDO_VBIF28_CON0, 0, 2800000),
|
|
MT6358_REG_FIXED("ldo_vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000),
|
|
MT6358_REG_FIXED("ldo_va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000),
|
|
MT6358_REG_FIXED("ldo_vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000),
|
|
MT6358_REG_FIXED("ldo_vaud28", VAUD28,
|
|
MT6358_LDO_VAUD28_CON0, 0, 2800000),
|
|
MT6358_LDO("ldo_vdram2", VDRAM2, vdram2_voltages, vdram2_idx,
|
|
MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0xf),
|
|
MT6358_LDO("ldo_vsim1", VSIM1, vsim_voltages, vsim_idx,
|
|
MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vibr", VIBR, vibr_voltages, vibr_idx,
|
|
MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vusb", VUSB, vusb_voltages, vusb_idx,
|
|
MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700),
|
|
MT6358_LDO("ldo_vcamd", VCAMD, vcamd_voltages, vcamd_idx,
|
|
MT6358_LDO_VCAMD_CON0, 0, MT6358_VCAMD_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, vefuse_idx,
|
|
MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vmch", VMCH, vmch_vemc_voltages, vmch_vemc_idx,
|
|
MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700),
|
|
MT6358_LDO("ldo_vcama1", VCAMA1, vcama_voltages, vcama_idx,
|
|
MT6358_LDO_VCAMA1_CON0, 0, MT6358_VCAMA1_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vemc", VEMC, vmch_vemc_voltages, vmch_vemc_idx,
|
|
MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700),
|
|
MT6358_LDO("ldo_vcn33_bt", VCN33_BT, vcn33_bt_wifi_voltages,
|
|
vcn33_bt_wifi_idx, MT6358_LDO_VCN33_CON0_0,
|
|
0, MT6358_VCN33_ANA_CON0, 0x300),
|
|
MT6358_LDO("ldo_vcn33_wifi", VCN33_WIFI, vcn33_bt_wifi_voltages,
|
|
vcn33_bt_wifi_idx, MT6358_LDO_VCN33_CON0_1,
|
|
0, MT6358_VCN33_ANA_CON0, 0x300),
|
|
MT6358_LDO("ldo_vcama2", VCAMA2, vcama_voltages, vcama_idx,
|
|
MT6358_LDO_VCAMA2_CON0, 0, MT6358_VCAMA2_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vmc", VMC, vmc_voltages, vmc_idx,
|
|
MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00),
|
|
MT6358_LDO("ldo_vldo28", VLDO28, vldo28_voltages, vldo28_idx,
|
|
MT6358_LDO_VLDO28_CON0_0, 0,
|
|
MT6358_VLDO28_ANA_CON0, 0x300),
|
|
MT6358_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx,
|
|
MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
|
|
MT6358_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON0, 0x7f),
|
|
MT6358_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON2, 0x7f),
|
|
MT6358_LDO1("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB, 500000,
|
|
1293750, 6250, buck_volt_range1,
|
|
MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1, 0x7f,
|
|
MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1, 0x7f),
|
|
MT6358_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON3, 0x7f),
|
|
MT6358_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON1, 0x7f),
|
|
};
|
|
|
|
/* The array is indexed by id(MT6366_ID_XXX) */
|
|
static struct mt6358_regulator_info mt6366_regulators[] = {
|
|
MT6366_BUCK("buck_vdram1", VDRAM1, 500000, 2087500, 12500,
|
|
buck_volt_range2, 0x7f, MT6358_BUCK_VDRAM1_DBG0, 0x7f,
|
|
MT6358_VDRAM1_ANA_CON0, 8),
|
|
MT6366_BUCK("buck_vcore", VCORE, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_DBG0, 0x7f,
|
|
MT6358_VCORE_VGPU_ANA_CON0, 1),
|
|
MT6366_BUCK("buck_vcore_sshub", VCORE_SSHUB, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VCORE_SSHUB_ELR0, 0x7f,
|
|
MT6358_VCORE_VGPU_ANA_CON0, 1),
|
|
MT6366_BUCK("buck_vpa", VPA, 500000, 3650000, 50000,
|
|
buck_volt_range3, 0x3f, MT6358_BUCK_VPA_DBG0, 0x3f,
|
|
MT6358_VPA_ANA_CON0, 3),
|
|
MT6366_BUCK("buck_vproc11", VPROC11, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC11_DBG0, 0x7f,
|
|
MT6358_VPROC_ANA_CON0, 1),
|
|
MT6366_BUCK("buck_vproc12", VPROC12, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VPROC12_DBG0, 0x7f,
|
|
MT6358_VPROC_ANA_CON0, 2),
|
|
MT6366_BUCK("buck_vgpu", VGPU, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VGPU_ELR0, 0x7f,
|
|
MT6358_VCORE_VGPU_ANA_CON0, 2),
|
|
MT6366_BUCK("buck_vs2", VS2, 500000, 2087500, 12500,
|
|
buck_volt_range2, 0x7f, MT6358_BUCK_VS2_DBG0, 0x7f,
|
|
MT6358_VS2_ANA_CON0, 8),
|
|
MT6366_BUCK("buck_vmodem", VMODEM, 500000, 1293750, 6250,
|
|
buck_volt_range1, 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f,
|
|
MT6358_VMODEM_ANA_CON0, 8),
|
|
MT6366_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
|
|
buck_volt_range4, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f,
|
|
MT6358_VS1_ANA_CON0, 8),
|
|
MT6366_REG_FIXED("ldo_vrf12", VRF12,
|
|
MT6358_LDO_VRF12_CON0, 0, 1200000),
|
|
MT6366_REG_FIXED("ldo_vio18", VIO18,
|
|
MT6358_LDO_VIO18_CON0, 0, 1800000),
|
|
MT6366_REG_FIXED("ldo_vcn18", VCN18, MT6358_LDO_VCN18_CON0, 0, 1800000),
|
|
MT6366_REG_FIXED("ldo_vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000),
|
|
MT6366_REG_FIXED("ldo_vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000),
|
|
MT6366_REG_FIXED("ldo_vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000),
|
|
MT6366_REG_FIXED("ldo_vaux18", VAUX18,
|
|
MT6358_LDO_VAUX18_CON0, 0, 1800000),
|
|
MT6366_REG_FIXED("ldo_vbif28", VBIF28,
|
|
MT6358_LDO_VBIF28_CON0, 0, 2800000),
|
|
MT6366_REG_FIXED("ldo_vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000),
|
|
MT6366_REG_FIXED("ldo_va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000),
|
|
MT6366_REG_FIXED("ldo_vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000),
|
|
MT6366_REG_FIXED("ldo_vaud28", VAUD28,
|
|
MT6358_LDO_VAUD28_CON0, 0, 2800000),
|
|
MT6366_LDO("ldo_vdram2", VDRAM2, vdram2_voltages, vdram2_idx,
|
|
MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10),
|
|
MT6366_LDO("ldo_vsim1", VSIM1, vsim_voltages, vsim_idx,
|
|
MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00),
|
|
MT6366_LDO("ldo_vibr", VIBR, vibr_voltages, vibr_idx,
|
|
MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00),
|
|
MT6366_LDO("ldo_vusb", VUSB, vusb_voltages, vusb_idx,
|
|
MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700),
|
|
MT6366_LDO("ldo_vefuse", VEFUSE, vefuse_voltages, vefuse_idx,
|
|
MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00),
|
|
MT6366_LDO("ldo_vmch", VMCH, vmch_vemc_voltages, vmch_vemc_idx,
|
|
MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700),
|
|
MT6366_LDO("ldo_vemc", VEMC, vmch_vemc_voltages, vmch_vemc_idx,
|
|
MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700),
|
|
MT6366_LDO("ldo_vcn33_bt", VCN33_BT, vcn33_bt_wifi_voltages,
|
|
vcn33_bt_wifi_idx, MT6358_LDO_VCN33_CON0_0,
|
|
0, MT6358_VCN33_ANA_CON0, 0x300),
|
|
MT6366_LDO("ldo_vcn33_wifi", VCN33_WIFI, vcn33_bt_wifi_voltages,
|
|
vcn33_bt_wifi_idx, MT6358_LDO_VCN33_CON0_1,
|
|
0, MT6358_VCN33_ANA_CON0, 0x300),
|
|
MT6366_LDO("ldo_vmc", VMC, vmc_voltages, vmc_idx,
|
|
MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00),
|
|
MT6366_LDO("ldo_vsim2", VSIM2, vsim_voltages, vsim_idx,
|
|
MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
|
|
MT6366_LDO1("ldo_vsram_proc11", VSRAM_PROC11, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON0, 0x7f),
|
|
MT6366_LDO1("ldo_vsram_others", VSRAM_OTHERS, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON2, 0x7f),
|
|
MT6366_LDO1("ldo_vsram_others_sshub", VSRAM_OTHERS_SSHUB, 500000,
|
|
1293750, 6250, buck_volt_range1,
|
|
MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1, 0x7f,
|
|
MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1, 0x7f),
|
|
MT6366_LDO1("ldo_vsram_gpu", VSRAM_GPU, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON3, 0x7f),
|
|
MT6366_LDO1("ldo_vsram_proc12", VSRAM_PROC12, 500000, 1293750, 6250,
|
|
buck_volt_range1, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00,
|
|
MT6358_LDO_VSRAM_CON1, 0x7f),
|
|
};
|
|
|
|
static int mt6358_regulator_probe(struct platform_device *pdev)
|
|
{
|
|
struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
|
|
struct regulator_config config = {};
|
|
struct regulator_dev *rdev;
|
|
struct mt6358_regulator_info *mt6358_info;
|
|
int i, max_regulator;
|
|
|
|
if (mt6397->chip_id == MT6366_CHIP_ID) {
|
|
max_regulator = MT6366_MAX_REGULATOR;
|
|
mt6358_info = mt6366_regulators;
|
|
} else {
|
|
max_regulator = MT6358_MAX_REGULATOR;
|
|
mt6358_info = mt6358_regulators;
|
|
}
|
|
|
|
for (i = 0; i < max_regulator; i++) {
|
|
config.dev = &pdev->dev;
|
|
config.driver_data = &mt6358_info[i];
|
|
config.regmap = mt6397->regmap;
|
|
|
|
rdev = devm_regulator_register(&pdev->dev,
|
|
&mt6358_info[i].desc,
|
|
&config);
|
|
if (IS_ERR(rdev)) {
|
|
dev_err(&pdev->dev, "failed to register %s\n",
|
|
mt6358_info[i].desc.name);
|
|
return PTR_ERR(rdev);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct platform_device_id mt6358_platform_ids[] = {
|
|
{"mt6358-regulator", 0},
|
|
{ /* sentinel */ },
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, mt6358_platform_ids);
|
|
|
|
static struct platform_driver mt6358_regulator_driver = {
|
|
.driver = {
|
|
.name = "mt6358-regulator",
|
|
},
|
|
.probe = mt6358_regulator_probe,
|
|
.id_table = mt6358_platform_ids,
|
|
};
|
|
|
|
module_platform_driver(mt6358_regulator_driver);
|
|
|
|
MODULE_AUTHOR("Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>");
|
|
MODULE_DESCRIPTION("Regulator Driver for MediaTek MT6358 PMIC");
|
|
MODULE_LICENSE("GPL");
|