294 lines
6.6 KiB
C
294 lines
6.6 KiB
C
/***************************************************************************/
|
|
|
|
/*
|
|
* linux/arch/m68knommu/platform/523x/config.c
|
|
*
|
|
* Sub-architcture dependant initialization code for the Freescale
|
|
* 523x CPUs.
|
|
*
|
|
* Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
|
|
* Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
|
|
*/
|
|
|
|
/***************************************************************************/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/param.h>
|
|
#include <linux/init.h>
|
|
#include <linux/io.h>
|
|
#include <linux/spi/spi.h>
|
|
#include <linux/gpio.h>
|
|
#include <asm/machdep.h>
|
|
#include <asm/coldfire.h>
|
|
#include <asm/mcfsim.h>
|
|
#include <asm/mcfuart.h>
|
|
#include <asm/mcfqspi.h>
|
|
|
|
/***************************************************************************/
|
|
|
|
static struct mcf_platform_uart m523x_uart_platform[] = {
|
|
{
|
|
.mapbase = MCF_MBAR + MCFUART_BASE1,
|
|
.irq = MCFINT_VECBASE + MCFINT_UART0,
|
|
},
|
|
{
|
|
.mapbase = MCF_MBAR + MCFUART_BASE2,
|
|
.irq = MCFINT_VECBASE + MCFINT_UART0 + 1,
|
|
},
|
|
{
|
|
.mapbase = MCF_MBAR + MCFUART_BASE3,
|
|
.irq = MCFINT_VECBASE + MCFINT_UART0 + 2,
|
|
},
|
|
{ },
|
|
};
|
|
|
|
static struct platform_device m523x_uart = {
|
|
.name = "mcfuart",
|
|
.id = 0,
|
|
.dev.platform_data = m523x_uart_platform,
|
|
};
|
|
|
|
static struct resource m523x_fec_resources[] = {
|
|
{
|
|
.start = MCF_MBAR + 0x1000,
|
|
.end = MCF_MBAR + 0x1000 + 0x7ff,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = 64 + 23,
|
|
.end = 64 + 23,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = 64 + 27,
|
|
.end = 64 + 27,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
{
|
|
.start = 64 + 29,
|
|
.end = 64 + 29,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device m523x_fec = {
|
|
.name = "fec",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(m523x_fec_resources),
|
|
.resource = m523x_fec_resources,
|
|
};
|
|
|
|
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
|
|
static struct resource m523x_qspi_resources[] = {
|
|
{
|
|
.start = MCFQSPI_IOBASE,
|
|
.end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = MCFINT_VECBASE + MCFINT_QSPI,
|
|
.end = MCFINT_VECBASE + MCFINT_QSPI,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
#define MCFQSPI_CS0 91
|
|
#define MCFQSPI_CS1 92
|
|
#define MCFQSPI_CS2 103
|
|
#define MCFQSPI_CS3 99
|
|
|
|
static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
|
|
{
|
|
int status;
|
|
|
|
status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
|
|
if (status) {
|
|
pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
|
|
goto fail0;
|
|
}
|
|
status = gpio_direction_output(MCFQSPI_CS0, 1);
|
|
if (status) {
|
|
pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
|
|
goto fail1;
|
|
}
|
|
|
|
status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
|
|
if (status) {
|
|
pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
|
|
goto fail1;
|
|
}
|
|
status = gpio_direction_output(MCFQSPI_CS1, 1);
|
|
if (status) {
|
|
pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
|
|
goto fail2;
|
|
}
|
|
|
|
status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
|
|
if (status) {
|
|
pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
|
|
goto fail2;
|
|
}
|
|
status = gpio_direction_output(MCFQSPI_CS2, 1);
|
|
if (status) {
|
|
pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
|
|
goto fail3;
|
|
}
|
|
|
|
status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
|
|
if (status) {
|
|
pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
|
|
goto fail3;
|
|
}
|
|
status = gpio_direction_output(MCFQSPI_CS3, 1);
|
|
if (status) {
|
|
pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
|
|
goto fail4;
|
|
}
|
|
|
|
return 0;
|
|
|
|
fail4:
|
|
gpio_free(MCFQSPI_CS3);
|
|
fail3:
|
|
gpio_free(MCFQSPI_CS2);
|
|
fail2:
|
|
gpio_free(MCFQSPI_CS1);
|
|
fail1:
|
|
gpio_free(MCFQSPI_CS0);
|
|
fail0:
|
|
return status;
|
|
}
|
|
|
|
static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
|
|
{
|
|
gpio_free(MCFQSPI_CS3);
|
|
gpio_free(MCFQSPI_CS2);
|
|
gpio_free(MCFQSPI_CS1);
|
|
gpio_free(MCFQSPI_CS0);
|
|
}
|
|
|
|
static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
|
|
u8 chip_select, bool cs_high)
|
|
{
|
|
switch (chip_select) {
|
|
case 0:
|
|
gpio_set_value(MCFQSPI_CS0, cs_high);
|
|
break;
|
|
case 1:
|
|
gpio_set_value(MCFQSPI_CS1, cs_high);
|
|
break;
|
|
case 2:
|
|
gpio_set_value(MCFQSPI_CS2, cs_high);
|
|
break;
|
|
case 3:
|
|
gpio_set_value(MCFQSPI_CS3, cs_high);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
|
|
u8 chip_select, bool cs_high)
|
|
{
|
|
switch (chip_select) {
|
|
case 0:
|
|
gpio_set_value(MCFQSPI_CS0, !cs_high);
|
|
break;
|
|
case 1:
|
|
gpio_set_value(MCFQSPI_CS1, !cs_high);
|
|
break;
|
|
case 2:
|
|
gpio_set_value(MCFQSPI_CS2, !cs_high);
|
|
break;
|
|
case 3:
|
|
gpio_set_value(MCFQSPI_CS3, !cs_high);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static struct mcfqspi_cs_control m523x_cs_control = {
|
|
.setup = m523x_cs_setup,
|
|
.teardown = m523x_cs_teardown,
|
|
.select = m523x_cs_select,
|
|
.deselect = m523x_cs_deselect,
|
|
};
|
|
|
|
static struct mcfqspi_platform_data m523x_qspi_data = {
|
|
.bus_num = 0,
|
|
.num_chipselect = 4,
|
|
.cs_control = &m523x_cs_control,
|
|
};
|
|
|
|
static struct platform_device m523x_qspi = {
|
|
.name = "mcfqspi",
|
|
.id = 0,
|
|
.num_resources = ARRAY_SIZE(m523x_qspi_resources),
|
|
.resource = m523x_qspi_resources,
|
|
.dev.platform_data = &m523x_qspi_data,
|
|
};
|
|
|
|
static void __init m523x_qspi_init(void)
|
|
{
|
|
u16 par;
|
|
|
|
/* setup QSPS pins for QSPI with gpio CS control */
|
|
writeb(0x1f, MCFGPIO_PAR_QSPI);
|
|
/* and CS2 & CS3 as gpio */
|
|
par = readw(MCFGPIO_PAR_TIMER);
|
|
par &= 0x3f3f;
|
|
writew(par, MCFGPIO_PAR_TIMER);
|
|
}
|
|
#endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
|
|
|
|
static struct platform_device *m523x_devices[] __initdata = {
|
|
&m523x_uart,
|
|
&m523x_fec,
|
|
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
|
|
&m523x_qspi,
|
|
#endif
|
|
};
|
|
|
|
/***************************************************************************/
|
|
|
|
static void __init m523x_fec_init(void)
|
|
{
|
|
u16 par;
|
|
u8 v;
|
|
|
|
/* Set multi-function pins to ethernet use */
|
|
par = readw(MCF_IPSBAR + 0x100082);
|
|
writew(par | 0xf00, MCF_IPSBAR + 0x100082);
|
|
v = readb(MCF_IPSBAR + 0x100078);
|
|
writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
|
|
}
|
|
|
|
/***************************************************************************/
|
|
|
|
static void m523x_cpu_reset(void)
|
|
{
|
|
local_irq_disable();
|
|
__raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
|
|
}
|
|
|
|
/***************************************************************************/
|
|
|
|
void __init config_BSP(char *commandp, int size)
|
|
{
|
|
mach_reset = m523x_cpu_reset;
|
|
}
|
|
|
|
/***************************************************************************/
|
|
|
|
static int __init init_BSP(void)
|
|
{
|
|
m523x_fec_init();
|
|
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
|
|
m523x_qspi_init();
|
|
#endif
|
|
platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(init_BSP);
|
|
|
|
/***************************************************************************/
|