140 lines
3.1 KiB
C
140 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arm/mach-socfpga/pm.c
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*
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* Copyright (C) 2014-2015 Altera Corporation. All rights reserved.
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*
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* with code from pm-imx6.c
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* Copyright 2011-2014 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*/
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#include <linux/bitops.h>
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#include <linux/genalloc.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of_platform.h>
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#include <linux/suspend.h>
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#include <asm/suspend.h>
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#include <asm/fncpy.h>
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#include "core.h"
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/* Pointer to function copied to ocram */
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static u32 (*socfpga_sdram_self_refresh_in_ocram)(u32 sdr_base);
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static int socfpga_setup_ocram_self_refresh(void)
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{
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struct platform_device *pdev;
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phys_addr_t ocram_pbase;
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struct device_node *np;
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struct gen_pool *ocram_pool;
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unsigned long ocram_base;
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void __iomem *suspend_ocram_base;
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int ret = 0;
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np = of_find_compatible_node(NULL, NULL, "mmio-sram");
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if (!np) {
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pr_err("%s: Unable to find mmio-sram in dtb\n", __func__);
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return -ENODEV;
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}
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pdev = of_find_device_by_node(np);
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if (!pdev) {
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pr_warn("%s: failed to find ocram device!\n", __func__);
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ret = -ENODEV;
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goto put_node;
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}
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ocram_pool = gen_pool_get(&pdev->dev, NULL);
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if (!ocram_pool) {
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pr_warn("%s: ocram pool unavailable!\n", __func__);
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ret = -ENODEV;
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goto put_device;
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}
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ocram_base = gen_pool_alloc(ocram_pool, socfpga_sdram_self_refresh_sz);
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if (!ocram_base) {
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pr_warn("%s: unable to alloc ocram!\n", __func__);
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ret = -ENOMEM;
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goto put_device;
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}
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ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
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suspend_ocram_base = __arm_ioremap_exec(ocram_pbase,
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socfpga_sdram_self_refresh_sz,
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false);
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if (!suspend_ocram_base) {
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pr_warn("%s: __arm_ioremap_exec failed!\n", __func__);
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ret = -ENOMEM;
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goto put_device;
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}
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/* Copy the code that puts DDR in self refresh to ocram */
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socfpga_sdram_self_refresh_in_ocram =
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(void *)fncpy(suspend_ocram_base,
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&socfpga_sdram_self_refresh,
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socfpga_sdram_self_refresh_sz);
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WARN(!socfpga_sdram_self_refresh_in_ocram,
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"could not copy function to ocram");
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if (!socfpga_sdram_self_refresh_in_ocram)
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ret = -EFAULT;
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put_device:
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put_device(&pdev->dev);
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put_node:
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of_node_put(np);
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return ret;
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}
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static int socfpga_pm_suspend(unsigned long arg)
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{
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u32 ret;
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if (!sdr_ctl_base_addr)
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return -EFAULT;
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ret = socfpga_sdram_self_refresh_in_ocram((u32)sdr_ctl_base_addr);
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pr_debug("%s self-refresh loops request=%d exit=%d\n", __func__,
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ret & 0xffff, (ret >> 16) & 0xffff);
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return 0;
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}
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static int socfpga_pm_enter(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_MEM:
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outer_disable();
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cpu_suspend(0, socfpga_pm_suspend);
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outer_resume();
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static const struct platform_suspend_ops socfpga_pm_ops = {
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.valid = suspend_valid_only_mem,
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.enter = socfpga_pm_enter,
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};
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static int __init socfpga_pm_init(void)
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{
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int ret;
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ret = socfpga_setup_ocram_self_refresh();
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if (ret)
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return ret;
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suspend_set_ops(&socfpga_pm_ops);
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pr_info("SoCFPGA initialized for DDR self-refresh during suspend.\n");
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return 0;
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}
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arch_initcall(socfpga_pm_init);
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