Alex Deucher 19eca43e5a drm/radeon: rework crtc pll setup to better support PPLL sharing ... We need the calculate the pixel clock before allocating a PPLL in order to insure the clocks really match. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2012-09-20 13:10:44 -04:00
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drm	drm/radeon: rework crtc pll setup to better support PPLL sharing	2012-09-20 13:10:44 -04:00
stub	i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO	2011-04-13 09:10:25 +10:00
vga	vga_switcheroo: Don't require handler init callback	2012-08-17 17:34:41 -04:00
Makefile	gpu: Add Intel GMA500(Poulsbo) Stub Driver	2010-10-26 11:00:13 +10:00