216 lines
6.4 KiB
Plaintext
216 lines
6.4 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config ARCH_HAS_RESET_CONTROLLER
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bool
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menuconfig RESET_CONTROLLER
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bool "Reset Controller Support"
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default y if ARCH_HAS_RESET_CONTROLLER
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help
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Generic Reset Controller support.
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This framework is designed to abstract reset handling of devices
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via GPIOs or SoC-internal reset controller modules.
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If unsure, say no.
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if RESET_CONTROLLER
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config RESET_A10SR
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tristate "Altera Arria10 System Resource Reset"
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depends on MFD_ALTERA_A10SR
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help
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This option enables support for the external reset functions for
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peripheral PHYs on the Altera Arria10 System Resource Chip.
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config RESET_ATH79
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bool "AR71xx Reset Driver" if COMPILE_TEST
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default ATH79
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help
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This enables the ATH79 reset controller driver that supports the
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AR71xx SoC reset controller.
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config RESET_AXS10X
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bool "AXS10x Reset Driver" if COMPILE_TEST
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default ARC_PLAT_AXS10X
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help
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This enables the reset controller driver for AXS10x.
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config RESET_BERLIN
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bool "Berlin Reset Driver" if COMPILE_TEST
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default ARCH_BERLIN
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help
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This enables the reset controller driver for Marvell Berlin SoCs.
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config RESET_BRCMSTB
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tristate "Broadcom STB reset controller"
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depends on ARCH_BRCMSTB || COMPILE_TEST
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default ARCH_BRCMSTB
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help
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This enables the reset controller driver for Broadcom STB SoCs using
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a SUN_TOP_CTRL_SW_INIT style controller.
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config RESET_HSDK
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bool "Synopsys HSDK Reset Driver"
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depends on HAS_IOMEM
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depends on ARC_SOC_HSDK || COMPILE_TEST
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help
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This enables the reset controller driver for HSDK board.
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config RESET_IMX7
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bool "i.MX7/8 Reset Driver" if COMPILE_TEST
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depends on HAS_IOMEM
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default SOC_IMX7D || (ARM64 && ARCH_MXC)
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select MFD_SYSCON
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help
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This enables the reset controller driver for i.MX7 SoCs.
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config RESET_LANTIQ
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bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
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default SOC_TYPE_XWAY
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help
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This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
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config RESET_LPC18XX
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bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
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default ARCH_LPC18XX
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help
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This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
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config RESET_MESON
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bool "Meson Reset Driver" if COMPILE_TEST
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default ARCH_MESON
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help
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This enables the reset driver for Amlogic Meson SoCs.
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config RESET_MESON_AUDIO_ARB
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tristate "Meson Audio Memory Arbiter Reset Driver"
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depends on ARCH_MESON || COMPILE_TEST
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help
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This enables the reset driver for Audio Memory Arbiter of
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Amlogic's A113 based SoCs
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config RESET_OXNAS
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bool
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config RESET_PISTACHIO
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bool "Pistachio Reset Driver" if COMPILE_TEST
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default MACH_PISTACHIO
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help
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This enables the reset driver for ImgTec Pistachio SoCs.
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config RESET_QCOM_AOSS
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bool "Qcom AOSS Reset Driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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This enables the AOSS (always on subsystem) reset driver
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for Qualcomm SDM845 SoCs. Say Y if you want to control
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reset signals provided by AOSS for Modem, Venus, ADSP,
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GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
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config RESET_QCOM_PDC
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tristate "Qualcomm PDC Reset Driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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This enables the PDC (Power Domain Controller) reset driver
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for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
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to control reset signals provided by PDC for Modem, Compute,
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Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
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config RESET_SCMI
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tristate "Reset driver controlled via ARM SCMI interface"
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depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
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default ARM_SCMI_PROTOCOL
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help
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This driver provides support for reset signal/domains that are
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controlled by firmware that implements the SCMI interface.
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This driver uses SCMI Message Protocol to interact with the
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firmware controlling all the reset signals.
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config RESET_SIMPLE
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bool "Simple Reset Controller Driver" if COMPILE_TEST
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default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC
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help
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This enables a simple reset controller driver for reset lines that
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that can be asserted and deasserted by toggling bits in a contiguous,
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exclusive register space.
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Currently this driver supports:
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- Altera SoCFPGAs
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- ASPEED BMC SoCs
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- RCC reset controller in STM32 MCUs
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- Allwinner SoCs
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- ZTE's zx2967 family
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- Bitmain BM1880 SoC
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config RESET_STM32MP157
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bool "STM32MP157 Reset Driver" if COMPILE_TEST
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default MACH_STM32MP157
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help
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This enables the RCC reset controller driver for STM32 MPUs.
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config RESET_SOCFPGA
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bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
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default ARCH_SOCFPGA
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select RESET_SIMPLE
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help
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This enables the reset driver for the SoCFPGA ARMv7 platforms. This
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driver gets initialized early during platform init calls.
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config RESET_SUNXI
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bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
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default ARCH_SUNXI
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select RESET_SIMPLE
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help
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This enables the reset driver for Allwinner SoCs.
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config RESET_TI_SCI
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tristate "TI System Control Interface (TI-SCI) reset driver"
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depends on TI_SCI_PROTOCOL
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help
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This enables the reset driver support over TI System Control Interface
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available on some new TI's SoCs. If you wish to use reset resources
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managed by the TI System Controller, say Y here. Otherwise, say N.
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config RESET_TI_SYSCON
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tristate "TI SYSCON Reset Driver"
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depends on HAS_IOMEM
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select MFD_SYSCON
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help
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This enables the reset driver support for TI devices with
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memory-mapped reset registers as part of a syscon device node. If
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you wish to use the reset framework for such memory-mapped devices,
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say Y here. Otherwise, say N.
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config RESET_UNIPHIER
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tristate "Reset controller driver for UniPhier SoCs"
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depends on ARCH_UNIPHIER || COMPILE_TEST
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depends on OF && MFD_SYSCON
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default ARCH_UNIPHIER
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help
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Support for reset controllers on UniPhier SoCs.
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Say Y if you want to control reset signals provided by System Control
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block, Media I/O block, Peripheral Block.
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config RESET_UNIPHIER_GLUE
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tristate "Reset driver in glue layer for UniPhier SoCs"
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depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
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default ARCH_UNIPHIER
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select RESET_SIMPLE
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help
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Support for peripheral core reset included in its own glue layer
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on UniPhier SoCs. Say Y if you want to control reset signals
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provided by the glue layer.
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config RESET_ZYNQ
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bool "ZYNQ Reset Driver" if COMPILE_TEST
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default ARCH_ZYNQ
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help
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This enables the reset controller driver for Xilinx Zynq SoCs.
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source "drivers/reset/sti/Kconfig"
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source "drivers/reset/hisilicon/Kconfig"
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source "drivers/reset/tegra/Kconfig"
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endif
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