257 lines
5.3 KiB
ArmAsm
257 lines
5.3 KiB
ArmAsm
/* Kernel link layout for various "sections"
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*
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* Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
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* Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
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* Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
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* Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
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* Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
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* Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
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* Copyright (C) 2006 Helge Deller <deller@gmx.de>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <asm-generic/vmlinux.lds.h>
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/* needed for the processor specific cache alignment size */
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#include <asm/cache.h>
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#include <asm/page.h>
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#include <asm/asm-offsets.h>
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/* ld script to make hppa Linux kernel */
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#ifndef CONFIG_64BIT
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OUTPUT_FORMAT("elf32-hppa-linux")
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OUTPUT_ARCH(hppa)
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#else
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OUTPUT_FORMAT("elf64-hppa-linux")
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OUTPUT_ARCH(hppa:hppa2.0w)
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#endif
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ENTRY(_stext)
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#ifndef CONFIG_64BIT
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jiffies = jiffies_64 + 4;
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#else
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jiffies = jiffies_64;
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#endif
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SECTIONS
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{
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. = KERNEL_BINARY_TEXT_START;
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_text = .; /* Text and read-only data */
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.text ALIGN(16) : {
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HEAD_TEXT
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TEXT_TEXT
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SCHED_TEXT
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LOCK_TEXT
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*(.text.do_softirq)
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*(.text.sys_exit)
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*(.text.do_sigaltstack)
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*(.text.do_fork)
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*(.text.*)
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*(.fixup)
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*(.lock.text) /* out-of-line lock text */
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*(.gnu.warning)
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} = 0
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/* End of text section */
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_etext = .;
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RODATA
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/* writeable */
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/* Make sure this is page aligned so
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* that we can properly leave these
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* as writable
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*/
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. = ALIGN(PAGE_SIZE);
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data_start = .;
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. = ALIGN(16);
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/* Exception table */
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__ex_table : {
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__start___ex_table = .;
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*(__ex_table)
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__stop___ex_table = .;
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}
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NOTES
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/* unwind info */
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.PARISC.unwind : {
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__start___unwind = .;
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*(.PARISC.unwind)
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__stop___unwind = .;
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}
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/* rarely changed data like cpu maps */
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. = ALIGN(16);
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.data.read_mostly : {
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*(.data.read_mostly)
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}
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. = ALIGN(L1_CACHE_BYTES);
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/* Data */
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.data : {
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DATA_DATA
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CONSTRUCTORS
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}
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. = ALIGN(L1_CACHE_BYTES);
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.data.cacheline_aligned : {
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*(.data.cacheline_aligned)
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}
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/* PA-RISC locks requires 16-byte alignment */
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. = ALIGN(16);
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.data.lock_aligned : {
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*(.data.lock_aligned)
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}
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/* nosave data is really only used for software suspend...it's here
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* just in case we ever implement it
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*/
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. = ALIGN(PAGE_SIZE);
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__nosave_begin = .;
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.data_nosave : {
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*(.data.nosave)
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}
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. = ALIGN(PAGE_SIZE);
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__nosave_end = .;
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/* End of data section */
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_edata = .;
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/* BSS */
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__bss_start = .;
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/* page table entries need to be PAGE_SIZE aligned */
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. = ALIGN(PAGE_SIZE);
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.data.vmpages : {
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*(.data.vm0.pmd)
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*(.data.vm0.pgd)
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*(.data.vm0.pte)
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}
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.bss : {
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*(.bss)
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*(COMMON)
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}
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__bss_stop = .;
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/* assembler code expects init_task to be 16k aligned */
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. = ALIGN(16384);
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/* init_task */
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.data.init_task : {
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*(.data.init_task)
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}
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#ifdef CONFIG_64BIT
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. = ALIGN(16);
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/* Linkage tables */
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.opd : {
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*(.opd)
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} PROVIDE (__gp = .);
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.plt : {
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*(.plt)
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}
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.dlt : {
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*(.dlt)
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}
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#endif
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/* reserve space for interrupt stack by aligning __init* to 16k */
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. = ALIGN(16384);
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__init_begin = .;
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.init.text : {
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_sinittext = .;
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INIT_TEXT
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_einittext = .;
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}
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.init.data : {
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INIT_DATA
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}
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. = ALIGN(16);
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.init.setup : {
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__setup_start = .;
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*(.init.setup)
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__setup_end = .;
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}
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.initcall.init : {
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__initcall_start = .;
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INITCALLS
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__initcall_end = .;
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}
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.con_initcall.init : {
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__con_initcall_start = .;
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*(.con_initcall.init)
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__con_initcall_end = .;
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}
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SECURITY_INIT
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/* alternate instruction replacement. This is a mechanism x86 uses
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* to detect the CPU type and replace generic instruction sequences
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* with CPU specific ones. We don't currently do this in PA, but
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* it seems like a good idea...
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*/
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. = ALIGN(4);
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.altinstructions : {
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__alt_instructions = .;
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*(.altinstructions)
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__alt_instructions_end = .;
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}
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.altinstr_replacement : {
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*(.altinstr_replacement)
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}
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/* .exit.text is discard at runtime, not link time, to deal with references
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* from .altinstructions and .eh_frame
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*/
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.exit.text : {
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EXIT_TEXT
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}
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.exit.data : {
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EXIT_DATA
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}
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#ifdef CONFIG_BLK_DEV_INITRD
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. = ALIGN(PAGE_SIZE);
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.init.ramfs : {
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__initramfs_start = .;
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*(.init.ramfs)
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__initramfs_end = .;
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}
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#endif
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PERCPU(PAGE_SIZE)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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/* freed after init ends here */
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_end = . ;
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/* Sections to be discarded */
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/DISCARD/ : {
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*(.exitcall.exit)
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#ifdef CONFIG_64BIT
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/* temporary hack until binutils is fixed to not emit these
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* for static binaries
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*/
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*(.interp)
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*(.dynsym)
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*(.dynstr)
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*(.dynamic)
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*(.hash)
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*(.gnu.hash)
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#endif
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}
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STABS_DEBUG
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.note 0 : { *(.note) }
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}
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