f58de3d96a
The iProc GPIO controller is shared among multiple iProc based SoCs. In the NSP integration, the drive strength pinctrl function is disabled. In the integration of Stingray, pinctrl is handled by another block and this GPIO controller is solely used as a GPIO controller, and therefore should not be registered to the pinconf framework This patch introduces new SoC specific compatible strings "brcm,iproc-nsp-gpio" for NSP with drive strength feature disabled and "brcm,iproc-stingray-gpio" for Stingray with all PINCONF features disabled This patch is developed based on the initial work from Yendapally Reddy Dhananjaya <yendapally.reddy@broadcom.com> who attempted to disable drive strength configuration for the iProc based NSP chip. In addition, Pramod Kumar <pramod.kumar@broadcom.com> also contributed to make the support more generic across all currently supported PINCONF functions in the iProc GPIO/PINCONF driver Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Signed-off-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| pinctrl-bcm281xx.c | ||
| pinctrl-bcm2835.c | ||
| pinctrl-cygnus-mux.c | ||
| pinctrl-iproc-gpio.c | ||
| pinctrl-ns2-mux.c | ||
| pinctrl-nsp-gpio.c | ||
| pinctrl-nsp-mux.c | ||