502 lines
13 KiB
C
502 lines
13 KiB
C
/*
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* i.MX IPUv3 DP Overlay Planes
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*
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* Copyright (C) 2013 Philipp Zabel, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include "video/imx-ipu-v3.h"
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#include "ipuv3-plane.h"
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#define to_ipu_plane(x) container_of(x, struct ipu_plane, base)
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static const uint32_t ipu_plane_formats[] = {
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DRM_FORMAT_ARGB1555,
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DRM_FORMAT_XRGB1555,
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DRM_FORMAT_ABGR1555,
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DRM_FORMAT_XBGR1555,
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DRM_FORMAT_RGBA5551,
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DRM_FORMAT_BGRA5551,
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DRM_FORMAT_ARGB4444,
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DRM_FORMAT_ARGB8888,
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DRM_FORMAT_XRGB8888,
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DRM_FORMAT_ABGR8888,
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DRM_FORMAT_XBGR8888,
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DRM_FORMAT_RGBA8888,
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DRM_FORMAT_RGBX8888,
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DRM_FORMAT_BGRA8888,
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DRM_FORMAT_BGRA8888,
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_YUV420,
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DRM_FORMAT_YVU420,
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DRM_FORMAT_RGB565,
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};
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int ipu_plane_irq(struct ipu_plane *ipu_plane)
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{
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return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
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IPU_IRQ_EOF);
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}
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static int calc_vref(struct drm_display_mode *mode)
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{
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unsigned long htotal, vtotal;
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htotal = mode->htotal;
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vtotal = mode->vtotal;
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if (!htotal || !vtotal)
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return 60;
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return DIV_ROUND_UP(mode->clock * 1000, vtotal * htotal);
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}
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static inline int calc_bandwidth(int width, int height, unsigned int vref)
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{
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return width * height * vref;
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}
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int ipu_plane_set_base(struct ipu_plane *ipu_plane, struct drm_framebuffer *fb,
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int x, int y)
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{
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struct drm_gem_cma_object *cma_obj[3];
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unsigned long eba, ubo, vbo;
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int active, i;
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for (i = 0; i < drm_format_num_planes(fb->pixel_format); i++) {
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cma_obj[i] = drm_fb_cma_get_gem_obj(fb, i);
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if (!cma_obj[i]) {
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DRM_DEBUG_KMS("plane %d entry is null.\n", i);
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return -EFAULT;
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}
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}
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eba = cma_obj[0]->paddr + fb->offsets[0] +
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fb->pitches[0] * y + (fb->bits_per_pixel >> 3) * x;
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if (eba & 0x7) {
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DRM_DEBUG_KMS("base address must be a multiple of 8.\n");
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return -EINVAL;
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}
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if (fb->pitches[0] < 1 || fb->pitches[0] > 16384) {
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DRM_DEBUG_KMS("pitches out of range.\n");
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return -EINVAL;
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}
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if (ipu_plane->enabled && fb->pitches[0] != ipu_plane->stride[0]) {
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DRM_DEBUG_KMS("pitches must not change while plane is enabled.\n");
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return -EINVAL;
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}
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ipu_plane->stride[0] = fb->pitches[0];
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switch (fb->pixel_format) {
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case DRM_FORMAT_YUV420:
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case DRM_FORMAT_YVU420:
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/*
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* Multiplanar formats have to meet the following restrictions:
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* - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
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* - EBA, UBO and VBO are a multiple of 8
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* - UBO and VBO are unsigned and not larger than 0xfffff8
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* - Only EBA may be changed while scanout is active
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* - The strides of U and V planes must be identical.
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*/
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ubo = cma_obj[1]->paddr + fb->offsets[1] +
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fb->pitches[1] * y / 2 + x / 2 - eba;
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vbo = cma_obj[2]->paddr + fb->offsets[2] +
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fb->pitches[2] * y / 2 + x / 2 - eba;
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if ((ubo & 0x7) || (vbo & 0x7)) {
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DRM_DEBUG_KMS("U/V buffer offsets must be a multiple of 8.\n");
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return -EINVAL;
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}
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if ((ubo > 0xfffff8) || (vbo > 0xfffff8)) {
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DRM_DEBUG_KMS("U/V buffer offsets must be positive and not larger than 0xfffff8.\n");
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return -EINVAL;
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}
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if (ipu_plane->enabled && ((ipu_plane->u_offset != ubo) ||
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(ipu_plane->v_offset != vbo))) {
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DRM_DEBUG_KMS("U/V buffer offsets must not change while plane is enabled.\n");
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return -EINVAL;
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}
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if (fb->pitches[1] != fb->pitches[2]) {
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DRM_DEBUG_KMS("U/V pitches must be identical.\n");
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return -EINVAL;
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}
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if (fb->pitches[1] < 1 || fb->pitches[1] > 16384) {
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DRM_DEBUG_KMS("U/V pitches out of range.\n");
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return -EINVAL;
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}
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if (ipu_plane->enabled &&
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(ipu_plane->stride[1] != fb->pitches[1])) {
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DRM_DEBUG_KMS("U/V pitches must not change while plane is enabled.\n");
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return -EINVAL;
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}
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ipu_plane->u_offset = ubo;
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ipu_plane->v_offset = vbo;
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ipu_plane->stride[1] = fb->pitches[1];
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dev_dbg(ipu_plane->base.dev->dev,
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"phys = %pad %pad %pad, x = %d, y = %d",
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&cma_obj[0]->paddr, &cma_obj[1]->paddr,
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&cma_obj[2]->paddr, x, y);
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break;
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default:
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dev_dbg(ipu_plane->base.dev->dev, "phys = %pad, x = %d, y = %d",
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&cma_obj[0]->paddr, x, y);
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break;
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}
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if (ipu_plane->enabled) {
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active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
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ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
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} else {
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
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ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
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}
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/* cache offsets for subsequent pageflips */
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ipu_plane->x = x;
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ipu_plane->y = y;
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return 0;
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}
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int ipu_plane_mode_set(struct ipu_plane *ipu_plane, struct drm_crtc *crtc,
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struct drm_display_mode *mode,
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struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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uint32_t src_w, uint32_t src_h, bool interlaced)
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{
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struct device *dev = ipu_plane->base.dev->dev;
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int ret;
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/* no scaling */
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if (src_w != crtc_w || src_h != crtc_h)
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return -EINVAL;
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/* clip to crtc bounds */
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if (crtc_x < 0) {
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if (-crtc_x > crtc_w)
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return -EINVAL;
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src_x += -crtc_x;
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src_w -= -crtc_x;
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crtc_w -= -crtc_x;
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crtc_x = 0;
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}
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if (crtc_y < 0) {
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if (-crtc_y > crtc_h)
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return -EINVAL;
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src_y += -crtc_y;
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src_h -= -crtc_y;
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crtc_h -= -crtc_y;
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crtc_y = 0;
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}
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if (crtc_x + crtc_w > mode->hdisplay) {
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if (crtc_x > mode->hdisplay)
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return -EINVAL;
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crtc_w = mode->hdisplay - crtc_x;
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src_w = crtc_w;
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}
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if (crtc_y + crtc_h > mode->vdisplay) {
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if (crtc_y > mode->vdisplay)
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return -EINVAL;
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crtc_h = mode->vdisplay - crtc_y;
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src_h = crtc_h;
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}
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/* full plane minimum width is 13 pixels */
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if (crtc_w < 13 && (ipu_plane->dp_flow != IPU_DP_FLOW_SYNC_FG))
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return -EINVAL;
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if (crtc_h < 2)
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return -EINVAL;
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/*
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* since we cannot touch active IDMAC channels, we do not support
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* resizing the enabled plane or changing its format
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*/
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if (ipu_plane->enabled) {
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if (src_w != ipu_plane->w || src_h != ipu_plane->h ||
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fb->pixel_format != ipu_plane->base.fb->pixel_format)
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return -EINVAL;
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return ipu_plane_set_base(ipu_plane, fb, src_x, src_y);
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}
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switch (ipu_plane->dp_flow) {
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case IPU_DP_FLOW_SYNC_BG:
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ret = ipu_dp_setup_channel(ipu_plane->dp,
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IPUV3_COLORSPACE_RGB,
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IPUV3_COLORSPACE_RGB);
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if (ret) {
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dev_err(dev,
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"initializing display processor failed with %d\n",
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ret);
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return ret;
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}
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ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
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break;
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case IPU_DP_FLOW_SYNC_FG:
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ipu_dp_setup_channel(ipu_plane->dp,
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ipu_drm_fourcc_to_colorspace(fb->pixel_format),
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IPUV3_COLORSPACE_UNKNOWN);
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ipu_dp_set_window_pos(ipu_plane->dp, crtc_x, crtc_y);
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/* Enable local alpha on partial plane */
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switch (fb->pixel_format) {
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case DRM_FORMAT_ARGB1555:
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case DRM_FORMAT_ABGR1555:
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case DRM_FORMAT_RGBA5551:
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case DRM_FORMAT_BGRA5551:
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case DRM_FORMAT_ARGB4444:
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case DRM_FORMAT_ARGB8888:
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case DRM_FORMAT_ABGR8888:
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case DRM_FORMAT_RGBA8888:
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case DRM_FORMAT_BGRA8888:
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ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
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break;
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default:
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break;
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}
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}
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ret = ipu_dmfc_alloc_bandwidth(ipu_plane->dmfc,
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calc_bandwidth(crtc_w, crtc_h,
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calc_vref(mode)), 64);
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if (ret) {
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dev_err(dev, "allocating dmfc bandwidth failed with %d\n", ret);
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return ret;
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}
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ipu_dmfc_config_wait4eot(ipu_plane->dmfc, crtc_w);
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ipu_cpmem_zero(ipu_plane->ipu_ch);
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ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h);
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ret = ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->pixel_format);
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if (ret < 0) {
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dev_err(dev, "unsupported pixel format 0x%08x\n",
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fb->pixel_format);
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return ret;
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}
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ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
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ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
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ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
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ret = ipu_plane_set_base(ipu_plane, fb, src_x, src_y);
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if (ret < 0)
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return ret;
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if (interlaced)
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ipu_cpmem_interlaced_scan(ipu_plane->ipu_ch, fb->pitches[0]);
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if (fb->pixel_format == DRM_FORMAT_YUV420) {
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ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
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ipu_plane->stride[1],
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ipu_plane->u_offset,
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ipu_plane->v_offset);
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} else if (fb->pixel_format == DRM_FORMAT_YVU420) {
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ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
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ipu_plane->stride[1],
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ipu_plane->v_offset,
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ipu_plane->u_offset);
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}
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ipu_plane->w = src_w;
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ipu_plane->h = src_h;
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return 0;
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}
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void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
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{
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if (!IS_ERR_OR_NULL(ipu_plane->dp))
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ipu_dp_put(ipu_plane->dp);
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if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
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ipu_dmfc_put(ipu_plane->dmfc);
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if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
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ipu_idmac_put(ipu_plane->ipu_ch);
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}
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int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
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{
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int ret;
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ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
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if (IS_ERR(ipu_plane->ipu_ch)) {
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ret = PTR_ERR(ipu_plane->ipu_ch);
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DRM_ERROR("failed to get idmac channel: %d\n", ret);
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return ret;
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}
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ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
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if (IS_ERR(ipu_plane->dmfc)) {
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ret = PTR_ERR(ipu_plane->dmfc);
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DRM_ERROR("failed to get dmfc: ret %d\n", ret);
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goto err_out;
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}
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if (ipu_plane->dp_flow >= 0) {
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ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
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if (IS_ERR(ipu_plane->dp)) {
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ret = PTR_ERR(ipu_plane->dp);
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DRM_ERROR("failed to get dp flow: %d\n", ret);
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goto err_out;
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}
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}
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return 0;
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err_out:
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ipu_plane_put_resources(ipu_plane);
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return ret;
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}
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void ipu_plane_enable(struct ipu_plane *ipu_plane)
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{
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if (ipu_plane->dp)
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ipu_dp_enable(ipu_plane->ipu);
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ipu_dmfc_enable_channel(ipu_plane->dmfc);
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ipu_idmac_enable_channel(ipu_plane->ipu_ch);
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if (ipu_plane->dp)
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ipu_dp_enable_channel(ipu_plane->dp);
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ipu_plane->enabled = true;
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}
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void ipu_plane_disable(struct ipu_plane *ipu_plane)
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{
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ipu_plane->enabled = false;
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ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
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if (ipu_plane->dp)
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ipu_dp_disable_channel(ipu_plane->dp);
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ipu_idmac_disable_channel(ipu_plane->ipu_ch);
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ipu_dmfc_disable_channel(ipu_plane->dmfc);
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if (ipu_plane->dp)
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ipu_dp_disable(ipu_plane->ipu);
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}
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/*
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* drm_plane API
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*/
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static int ipu_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
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struct drm_framebuffer *fb, int crtc_x, int crtc_y,
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unsigned int crtc_w, unsigned int crtc_h,
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uint32_t src_x, uint32_t src_y,
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uint32_t src_w, uint32_t src_h)
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{
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struct ipu_plane *ipu_plane = to_ipu_plane(plane);
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int ret = 0;
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DRM_DEBUG_KMS("plane - %p\n", plane);
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if (!ipu_plane->enabled)
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ret = ipu_plane_get_resources(ipu_plane);
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if (ret < 0)
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return ret;
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ret = ipu_plane_mode_set(ipu_plane, crtc, &crtc->hwmode, fb,
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crtc_x, crtc_y, crtc_w, crtc_h,
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src_x >> 16, src_y >> 16, src_w >> 16, src_h >> 16,
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false);
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if (ret < 0) {
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ipu_plane_put_resources(ipu_plane);
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return ret;
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}
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if (crtc != plane->crtc)
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dev_dbg(plane->dev->dev, "crtc change: %p -> %p\n",
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plane->crtc, crtc);
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plane->crtc = crtc;
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if (!ipu_plane->enabled)
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ipu_plane_enable(ipu_plane);
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return 0;
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}
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static int ipu_disable_plane(struct drm_plane *plane)
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{
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struct ipu_plane *ipu_plane = to_ipu_plane(plane);
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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if (ipu_plane->enabled)
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ipu_plane_disable(ipu_plane);
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ipu_plane_put_resources(ipu_plane);
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return 0;
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}
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static void ipu_plane_destroy(struct drm_plane *plane)
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{
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struct ipu_plane *ipu_plane = to_ipu_plane(plane);
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DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
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ipu_disable_plane(plane);
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drm_plane_cleanup(plane);
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kfree(ipu_plane);
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}
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static struct drm_plane_funcs ipu_plane_funcs = {
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.update_plane = ipu_update_plane,
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.disable_plane = ipu_disable_plane,
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.destroy = ipu_plane_destroy,
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};
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struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
|
|
int dma, int dp, unsigned int possible_crtcs,
|
|
enum drm_plane_type type)
|
|
{
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|
struct ipu_plane *ipu_plane;
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|
int ret;
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|
|
|
DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
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|
dma, dp, possible_crtcs);
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|
|
|
ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
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|
if (!ipu_plane) {
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|
DRM_ERROR("failed to allocate plane\n");
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|
return ERR_PTR(-ENOMEM);
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|
}
|
|
|
|
ipu_plane->ipu = ipu;
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|
ipu_plane->dma = dma;
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|
ipu_plane->dp_flow = dp;
|
|
|
|
ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
|
|
&ipu_plane_funcs, ipu_plane_formats,
|
|
ARRAY_SIZE(ipu_plane_formats), type,
|
|
NULL);
|
|
if (ret) {
|
|
DRM_ERROR("failed to initialize plane\n");
|
|
kfree(ipu_plane);
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
return ipu_plane;
|
|
}
|